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path: root/src/soc/intel/alderlake
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* soc/intel/common/cse: Rework heci_disable functionSubrata Banik2022-02-021-1/+1
* soc/intel/alderlake: Add PMC register base for ADL-NUsha P2022-02-011-0/+5
* soc/intel/alderlake: Select SOC_INTEL_COMMON_BLOCK_SCS for Alder Lake NKrishna Prasad Bhat2022-02-011-0/+1
* soc/intel/alderlake: Add eMMC PCR Port ID for Alder Lake NKrishna Prasad Bhat2022-02-011-0/+3
* soc/intel/alderlake: Add GPP_I GPIO group for Alder Lake N SOCKrishna Prasad Bhat2022-02-014-49/+301
* soc/intel/adl: Update devicetree based on remapping for TBT PCIeMAULIK V VAGHELA2022-01-314-0/+20
* soc/intel/alderlake: Add Alder Lake P IGD device IDsKane Chen2022-01-311-0/+3
* soc/intel: Abstract the common block API for TCSS registers accessJohn Zhao2022-01-281-0/+1
* soc/intel/alderlake: Enable CPPCv3Sridahr Siricilla2022-01-282-0/+12
* soc/intel/alderlake: Add GPIO Controller device ID for ADL-NUsha P2022-01-261-0/+5
* soc/intel/alderlake: Choose non-posted write to lock GPIO PADSubrata Banik2022-01-261-0/+1
* soc/intel/alderlake: Skip FSP to unlock GPIO PadsSubrata Banik2022-01-261-1/+1
* soc/intel/adl: Replace dt `HeciEnabled` by `HECI1 disable` configSubrata Banik2022-01-253-9/+4
* soc/intel/common: Include Alder Lake-N device IDsUsha P2022-01-252-0/+5
* soc/intel/alderlake: Implement get_soc_cpu_type helper functionSridhar Siricilla2022-01-221-0/+21
* soc/intel/alderlake: Add ADL-P 2+8+2 (28W) VR configCurtis Chen2022-01-213-3/+8
* soc/intel/common/cpu: Use SoC overrides to get CPU privilege levelSubrata Banik2022-01-192-1/+11
* soc/intel/alderlake: Rework the GPIO PAD Pin numbersSubrata Banik2022-01-191-420/+485
* soc/intel/alderlake: Add eMMC device into chipset.cbKrishna Prasad Bhat2022-01-181-0/+2
* soc/intel/{adl,common}: Support alderlake host device id 0x4619Kane Chen2022-01-182-0/+2
* src: Remove unused <cbfs.h>Elyes HAOUAS2022-01-171-1/+0
* vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2511_04Nick Vaccaro2022-01-132-27/+27
* soc/intel/alderlake: Factor out A0 stepping workaroundAngel Pons2022-01-115-0/+104
* soc/intel/alderlake: Update the ADL-P SKU parameters for VR domainsCurtis Chen2022-01-103-35/+51
* soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDsTim Wawrzynczak2022-01-071-0/+22
* soc/intel/alderlake: Check clkreq overlapKane Chen2022-01-071-1/+8
* soc/intel/alderlake: Add minimal ACPI support for PEG portsTim Wawrzynczak2022-01-062-0/+22
* soc/intel/alderlake: Add soc_get_cpu_rp_vw_idx() functionTim Wawrzynczak2022-01-061-0/+19
* soc/intel/alderlake: Fix GPIO reset mapping as per GPIO BWGSubrata Banik2022-01-061-23/+23
* src/soc/intel: Remove unused <delay.h>Elyes HAOUAS2022-01-051-1/+0
* soc/intel: Remove unused <string.h>Elyes HAOUAS2022-01-051-1/+0
* soc/intel/alderlake: Add option to make MRC log silentSubrata Banik2022-01-032-0/+4
* soc/intel/{adl,ehl,tgl}: Rename spi_protection_mode to mfg_modeSubrata Banik2022-01-022-3/+3
* src: Drop duplicated includesElyes HAOUAS2022-01-012-3/+0
* soc/intel/alderlake: Fix incorrect comment about debug consentSubrata Banik2021-12-301-1/+1
* soc/intel/alderlake: Add timestamp for cse_fw_syncSridhar Siricilla2021-12-231-1/+5
* soc/intel/alderlake: remove SOC_INTEL_COMMON_BLOCK_SMM_LOCK_GPIO_PADSScott Chao2021-12-221-1/+0
* soc/intel/common: Do not trigger crashlog on all resets by defaultCurtis Chen2021-12-201-7/+0
* soc/intel/alderlake: Implement function to map physical port to EC portMAULIK V VAGHELA2021-12-132-0/+33
* soc/intel/alderlake: Define soc_get_pcie_rp_typeTim Wawrzynczak2021-12-133-2/+62
* drivers/intel/mipi_camera: Add ACPI entry to provide silicon type infoSugnan Prabhu S2021-12-131-0/+6
* soc/intel/cse: config to enable oem key manifestRavindra N2021-12-101-1/+1
* soc/intel/alderlake: Fix value of SA_DEVFN_CPU_PCIE1_0Tim Wawrzynczak2021-12-091-1/+1
* soc/intel/alderlake: enable gpio lockingNick Vaccaro2021-12-072-0/+58
* soc/intel/alderlake: Add ADL-P 6+8+2 (28W) VR configCurtis Chen2021-12-061-0/+5
* soc/intel/alderlake: Add support for ADL-N CPU TypeUsha P2021-12-062-0/+12
* soc/intel: Move enum pcie_rp_type to intelblocks/pcie_rp.hTim Wawrzynczak2021-12-061-10/+5
* soc/intel/adl: Add override skip_cse_sub_part_update() for alderlakeKrishna Prasad Bhat2021-12-031-0/+6
* soc/intel/alderlake: Add support for ADL-N PCHUsha P2021-12-032-0/+11
* soc/intel/alderlake: Add the CnviDdrRfim configurationRonak Kanabar2021-12-032-0/+8
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