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path: root/src/soc/intel/alderlake
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* soc/intel/common/acpi,mb/*: replace the two obsolete LPID with PEPDMichael Niewöhner2020-11-201-2/+2
* soc/intel/alderlake: Add PCH ID 0x5181Subrata Banik2020-11-121-0/+1
* mb/intel: Enable ALC711 Audio codec over SNDW0 linkSridhar Siricilla2020-11-071-2/+1
* soc/intel: Select SOC_INTEL_COMMON_BLOCK_CAR as per alphabetical orderSubrata Banik2020-11-031-1/+1
* soc/intel: Use of common reset code blockSubrata Banik2020-11-022-17/+2
* mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg'Subrata Banik2020-10-292-0/+7
* soc/intel: deduplicate ACPI timer emulationMichael Niewöhner2020-10-281-21/+0
* mb/*,soc/intel: drop the obsolete dt option `speed_shift_enable`Michael Niewöhner2020-10-261-2/+0
* soc/intel: drop unneeded ISST configuration codeMichael Niewöhner2020-10-261-28/+0
* soc/intel/alderlake/romstage: Skip GPIO configuration from FSPSubrata Banik2020-10-251-0/+3
* {cpu,soc}/intel: deduplicate cpu codeMichael Niewöhner2020-10-242-41/+1
* soc/intel: convert XTAL frequency constant to KconfigMichael Niewöhner2020-10-213-8/+10
* soc/intel/common: add Kconfig for PM Timer emulation supportMichael Niewöhner2020-10-211-0/+1
* soc/intel/*: drop useless XTAL shutdown qualification codeMichael Niewöhner2020-10-191-4/+0
* cpu/intel,soc/intel: drop Kconfig for hyperthreadingMichael Niewöhner2020-10-171-1/+0
* soc/intel/alderlake: Enable TME for Alder LakeSubrata Banik2020-10-142-0/+3
* soc/intel: Make use of common gfx.aslSubrata Banik2020-10-081-0/+3
* soc/intel/alderlake/ramstage: Fix compilation issueSubrata Banik2020-10-062-3/+4
* soc/intel/alderlake/acpi: Add SoC ACPI directory for ADLSubrata Banik2020-10-0613-0/+2363
* soc/intel: remove duplicate weak versions of mainboard_get_dram_part_num()Nick Vaccaro2020-10-051-6/+0
* soc: move mainboard_get_dram_part_num prototype to memory_info.hNick Vaccaro2020-10-051-2/+0
* mb, soc: change mainboard_get_dram_part_num() prototypeNick Vaccaro2020-10-052-4/+6
* soc/intel/alderlake/ramstage: Do initial SoC commit till ramstageSubrata Banik2020-10-0335-18/+3191
* drivers/spi: Add BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES configShelley Chen2020-10-021-1/+0
* soc/intel/alderlake: Add GPIOs for Alder Lake SOCSubrata Banik2020-09-277-12/+986
* soc/intel/alderlake: Select ACPI_INTEL_HARDWARE_SLEEP_VALUESAngel Pons2020-09-241-0/+1
* soc/intel/alderlake/romstage: Fix compilation issueSubrata Banik2020-09-241-1/+1
* Revert "soc/intel: Refactor do_global_reset() function"Furquan Shaikh2020-09-221-0/+15
* soc/intel: Refactor do_global_reset() functionSubrata Banik2020-09-211-15/+0
* soc/intel/common/block/cse: Refactor cse_request_global_reset() functionSubrata Banik2020-09-191-1/+1
* soc/intel/alderlake/romstage: Do initial SoC commit till romstageSubrata Banik2020-09-1519-0/+1471
* soc/intel/alderlake: Rename pch_init() codeSubrata Banik2020-09-103-3/+3
* vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332Subrata Banik2020-09-091-0/+10
* soc/intel/alderlake/bootblock: Do initial SoC commit till bootblockSubrata Banik2020-09-0515-0/+1136
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