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path: root/src/soc/intel/apollolake/chip.h
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* soc/intel/apollolake: Enable SATA Power OptimisationSean Rhodes2022-06-231-0/+3
* soc/intel/apollolake: Hook Up SataPortEnable to devicetreeSean Rhodes2022-06-201-0/+3
* soc/intel/apollolake: Hook up C1e to enhanced_cstatesSean Rhodes2022-06-201-0/+3
* soc/intel/apollolake: Allow configuring the LPC IO registersSean Rhodes2022-06-201-0/+6
* soc/intel/apollolake: Hook up Sata Hot Plug to device treeSean Rhodes2022-05-211-0/+3
* soc/apollolake: Make IO decode / enable register configurableSean Rhodes2022-02-151-0/+4
* soc/intel/appololake: Allow to configure SATA ALPM via devicetreeMario Scheithauer2022-02-011-0/+3
* soc/intel/apollolake: Hook up GMA ACPI brightness controlsMatt DeVillier2021-01-041-0/+3
* nb/intel/hsw,soc/intel/{bdw,skl,apl},mb/*: unify dt panel settingsMichael Niewöhner2021-01-011-22/+8
* soc/intel/*/chip.h: Use `uint32_t` for `tcc_offset`Angel Pons2020-09-271-1/+1
* soc/intel/apl: Add panel power and backlight configurationNico Huber2020-09-061-0/+23
* apollolake: update processor power limits configurationSumeet R Pawnikar2020-05-261-5/+4
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-061-12/+1
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-061-2/+1
* soc/intel/apollolake: Disable XHCI LFPS power managementMarx Wang2020-04-141-0/+8
* soc: Remove copyright noticesPatrick Georgi2020-03-181-3/+0
* soc/apl: add options to override USB port configMaxim Polyakov2020-03-061-0/+5
* soc/intel/sgx: convert SGX and PRMRR devicetree options to KconfigMichael Niewöhner2019-11-041-12/+0
* soc/intel: Rename <intelblocks/chip.h>Kyösti Mälkki2019-09-291-1/+1
* intel/apollolake: Add parameter to enable VTD in devicetreeWerner Zeh2019-02-051-0/+6
* soc/intel/apollolake: Sync fsp upd structure updateJohn Zhao2019-01-301-0/+20
* soc/intel/apollolake: Add option to disable xHCI Link Compliance ModeJohn Zhao2019-01-141-0/+6
* soc/intel/apollolake: Improve cold boot and S3 resumeJohn Zhao2018-11-081-0/+6
* soc/intel/apollolake: Provide interface to update TCC offsetJohn Su2018-11-071-0/+3
* soc/intel/apollolake: Make eMMC max speed configurableMario Scheithauer2018-08-241-1/+4
* soc/intel/common/block/cpu: Add option to skip coreboot AP initSubrata Banik2018-06-221-7/+0
* soc/intel/common/block: Add common chip config blockSubrata Banik2018-06-061-6/+4
* soc/intel/{apollolake, geminilake}: Add option to skip coreboot MP initSubrata Banik2018-06-051-0/+7
* soc/intel/apollolake: Add support for GSPIRavi Sarawadi2018-03-201-0/+4
* soc/intel/apollolake: Add PCIe de-emphasis enable configuration.Shamile Khan2018-03-191-0/+3
* soc/intel/apollolake: Add config option for enabling hotplugFurquan Shaikh2018-03-161-0/+3
* soc/intel/apollolake and mainboards: Use pcie_rp_clkreq_pin arrayFurquan Shaikh2018-03-161-6/+2
* ic2/designware: Move Intel i2c logic to shared driverChris Ching2017-12-221-2/+2
* src/soc/intel/apollolake: include helpers.h in chip.hPratik Prajapati2017-12-141-0/+1
* soc/intel/apollolake: Remove set_subsystem() from SoCSubrata Banik2017-12-131-1/+0
* soc/intel/apollolake: Add PNP configDivya Chellap2017-12-021-0/+12
* src: Fix all Siemens copyrightsMario Scheithauer2017-11-071-1/+1
* soc/intel/apollolake: Add PrmrrSize and SGX enable configPratik Prajapati2017-09-271-0/+12
* soc/intel/apollolake: Make SCI configurableMario Scheithauer2017-09-211-0/+4
* include/device: Split i2c.h into threeNico Huber2017-08-181-1/+1
* soc/intel/common/block: Add LPC Common code and use it for APLRavi Sarawadi2017-08-151-7/+1
* soc/intel/apollolake: Use common gpio for apollolakeHannah Williams2017-07-031-1/+0
* intel/common/block/i2c: Add common block for I2C and use the same in SoCsRizwan Qureshi2017-05-181-1/+1
* soc/intel/apollolake: Wrap lines at 80 columnsLee Leahy2017-03-131-2/+4
* soc/intel/apollolake: Add PM methods to power gate SD cardVenkateswarlu Vinjamuri2017-03-101-0/+5
* soc/intel/apollolake: Allow USB2 eye pattern configuration in devicetreeKane Chen2017-01-141-0/+5
* soc/intel/apollolake: Set PL2 in RAPL registerSumeet Pawnikar2016-12-081-0/+2
* soc/intel/common/lpss_i2c: simplify API and use common config structureAaron Durbin2016-11-111-10/+1
* soc/intel/apollolake: Set PL1 limits for RAPL MSR registersSumeet Pawnikar2016-10-161-0/+3
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