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path: root/src/soc/intel/baytrail/chip.h
Commit message (Expand)AuthorAgeFilesLines
* baytrail: add code for supporting 2x ddr refresh rateKane Chen2015-04-101-0/+1
* baytrail: use the setting in devicetree.cb to config USBPHY_COMPBGKane Chen2015-01-161-0/+1
* baytrail: initialize backlight PWM frequencyAaron Durbin2014-12-171-0/+2
* baytrail: Remove unused devicetree fieldsShawn Nematbakhsh2014-10-281-11/+0
* baytrail/rambi: S3 support and other updatesKein Yuan2014-10-221-3/+7
* rambi/baytrail: ACPI, GPIO, audio, misc updatesShawn Nematbakhsh2014-09-181-0/+7
* baytrail: Add support for LPSS and SCC devices in ACPI modeDuncan Laurie2014-05-101-0/+5
* baytrail: Enable panel and set timingsDuncan Laurie2014-05-091-0/+25
* baytrail: allow SD card controller capabilities overridesAaron Durbin2014-05-091-0/+4
* baytrail: add lpe codec clock configurationAaron Durbin2014-05-081-0/+4
* baytrail: pcie: Root port initializationAaron Durbin2014-05-071-0/+1
* baytrail: Add EHCI initializationDuncan Laurie2014-03-111-0/+10
* baytrail: Add XHCI initializationDuncan Laurie2014-03-111-0/+7
* baytrail: Add SATA driverShawn Nematbakhsh2014-02-271-2/+8
* baytrail: add initial supportAaron Durbin2014-01-311-0/+29
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