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path: root/src/soc/intel/cannonlake/bootblock
Commit message (Expand)AuthorAgeFilesLines
* treewide: Remove unused <cpu/x86/mtrr.h>Elyes Haouas2022-07-201-1/+0
* soc/intel: clean up dmi driver codeWonkyu Kim2022-04-201-6/+0
* src: Make PCI ID define names shorterFelix Singer2022-03-071-101/+101
* soc/intel/cannonlake: Make use of `cpu/intel/cpu_ids.h'Subrata Banik2021-07-171-1/+1
* soc/intel/{apl,cnl}: Remove FSP CAR optionArthur Heymans2021-06-221-32/+0
* soc/intel/*: drop UART pad configuration from common codeMichael Niewöhner2021-03-121-0/+1
* soc/intel/cannonlake: Move `gpi_clear_int_cfg()` callAngel Pons2021-03-032-5/+7
* soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons2021-03-012-11/+2
* soc/intel/cannonlake: Drop unnecessary guardAngel Pons2021-03-011-3/+1
* soc/intel/{skl,cnl}: Do not chain-include systemagent.hAngel Pons2021-03-011-0/+1
* pci_ids/intel: Add missing CFL-S GT1 IGD IDsNico Huber2021-02-031-0/+2
* pci_ids/intel: Correct 0x3e96, it's a CFL-S partNico Huber2021-02-031-1/+1
* soc/intel/*: drop incomplete and unneeded check for DMI SRLOCKMichael Niewöhner2021-01-311-16/+1
* soc/intel/{skl,cnl,xsp,icl,tgl,ehl,adl,jsl}: use common LPC mirroringMichael Niewöhner2021-01-251-16/+2
* soc/intel/cnl: use Kconfig to determine PCH typeMichael Niewöhner2021-01-241-8/+2
* soc/intel/common/dmi: Move DMI defines into DMI driver headerSrinidhi N Kaushik2020-12-091-3/+1
* soc/intel: Configure P2SB before other PCH controllersFurquan Shaikh2020-11-291-2/+7
* src/soc/intel: Drop unneeded empty linesElyes HAOUAS2020-09-211-1/+0
* soc/intel/{cnl,icl,jsl,tgl}: Use Bus Master for setting up PWRMBASESubrata Banik2020-08-071-10/+4
* {nb,soc}/intel: Use get_current_microcode_rev() for ucode versionSubrata Banik2020-08-051-9/+2
* soc/intel/cannonlake: Move tco_configure to bootblockTim Wawrzynczak2020-07-221-0/+4
* soc/intel/*/bootblock/cpu.c: Drop unused includesElyes HAOUAS2020-06-021-1/+0
* src: Remove unused 'include <string.h>'Elyes HAOUAS2020-05-181-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-114-4/+0
* soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-05-011-6/+5
* soc/intel/cannonlake/bootblock: Fix FSP CARPatrick Rudolph2020-05-011-3/+6
* soc/intel/cannonlake: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-064-52/+8
* soc: Remove copyright noticesPatrick Georgi2020-03-184-7/+0
* soc/intel/{cnl,icl,skl,tgl}/bootblock: Update text for DMI PCR 2774Wim Vervoorn2020-02-171-2/+2
* soc/intel{cnl,icl,skl,tgl}/bootblock: Make sure DMI PCR 2770 is setWim Vervoorn2020-02-171-0/+5
* soc/intel: Remove duplicate CPUID entrySubrata Banik2020-02-041-1/+1
* soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDsGaggery Tsai2020-01-181-0/+2
* soc/intel/cannonlake: Add Comet Lake H SA 4+2 Device IDJamie Chen2020-01-081-0/+1
* soc/intel/cannonlake: Clean up report_cpu_info() functionUsha P2019-12-261-24/+4
* soc/intel/cannonlake: Refactor pch_early_init() codeUsha P2019-12-262-12/+3
* include/device/pci_ids: Add Coffeelake U IGD P630Christian Walter2019-12-101-0/+1
* soc/intel/cannonlake: Configure GPIO PM configuration in bootblockSubrata Banik2019-12-031-0/+4
* soc/intel/cannonlake: Fix compilationPraveen Hodagatta Pranesh2019-12-021-2/+2
* src/soc/intel: Add Cometlake-S and CMP-H skusGaggery Tsai2019-12-021-2/+18
* soc/intel/{apl,cnl,dnv,skl}: Skip ucode loading by FSP-TSubrata Banik2019-11-261-4/+13
* soc/intel/{cnl,icl,skl}: Fix multiple whitespace issueSubrata Banik2019-10-311-1/+1
* soc/intel/cnl: Add CML IGD IDsMeera Ravindranath2019-08-281-0/+2
* lib/bootblock: Add simplified entry with basetimeKyösti Mälkki2019-08-261-1/+1
* soc/intel/cannonlake: Add 4E/4F to early io initChristian Walter2019-08-161-1/+1
* soc/intel/cannonlake: Add more PCI Ids for CoffeelakeChristian Walter2019-08-161-0/+8
* soc/intel/cannonlake/bootblock: Clear the GPI IS & IE registersDavid Wu2019-08-011-0/+5
* soc/intel/cannonlake: Add new PCI IDsFelix Singer2019-07-301-1/+10
* soc/intel/cannonlake: Add device Ids for new CFL SKUs supportLean Sheng Tan2019-07-171-3/+11
* soc/intel/common: Add Coffee Lake H 6+2 Xeon graphics idNico Huber2019-07-121-0/+1
* soc/intel/common: Add CM246 LPC device idNico Huber2019-07-121-0/+1
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