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path: root/src/soc/intel/cannonlake/chip.c
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* soc/intel: Replace config_of_path() with config_of_soc()Kyösti Mälkki2019-10-021-1/+1
* soc/intel: Rename <intelblocks/chip.h>Kyösti Mälkki2019-09-291-1/+1
* soc/intel: Use config_of_path(SA_DEVFN_ROOT)Kyösti Mälkki2019-07-181-6/+1
* soc/intel/cannonlake: Make use of gpio_pm_configure()Subrata Banik2019-05-201-0/+23
* soc/{amd,intel}/chip: Use local include for chip.hElyes HAOUAS2019-04-261-1/+2
* src/soc/intel/cannonlake: Remove ITSS IPC restoreAamir Bohra2019-04-081-8/+0
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-2/+2
* soc/intel/cannonlake: Configure GPIOs again after FSP-S is doneFurquan Shaikh2019-02-071-0/+30
* soc/intel/cannonlake: Add USB device namesDuncan Laurie2018-12-041-0/+37
* src: Remove unneeded include <console/console.h>Elyes HAOUAS2018-11-161-1/+0
* soc/intel/cannonlake: Add new cannon lake PCH-H supportpraveen hodagatta pranesh2018-10-171-0/+8
* soc/intel/cannonlake: Ensure FSP don't override ITSS IPCx registersSubrata Banik2018-10-091-0/+9
* Move compiler.h to commonlibNico Huber2018-10-081-1/+0
* soc/intel/cannonlake: Move the FSP related callbacks to separate filesRizwan Qureshi2018-10-041-193/+0
* soc/intel/cannonlake: Update UPD from device switchLijian Zhao2018-09-281-26/+46
* soc/intel/common/block/cpu: Add option to skip coreboot AP initSubrata Banik2018-06-221-1/+2
* soc/intel/cannonlake: Add option to skip coreboot MP initSubrata Banik2018-06-051-1/+1
* soc/intel/cannonlake: Get rid of device_tElyes HAOUAS2018-06-011-2/+2
* soc/intel/cannonlake: Select common XHCI codeSubrata Banik2018-05-271-1/+2
* {mb,nb,soc}: Remove references to pci_bus_default_ops()Nico Huber2018-05-081-1/+0
* compiler.h: add __weak macroAaron Durbin2018-04-241-1/+2
* soc/intel/cannonlake: Add VT-d and VMX programmingLijian Zhao2018-04-051-0/+4
* soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabledDuncan Laurie2018-03-281-2/+7
* soc/intel/cannonlake: Enable low power S0 Idle capabilityVaibhav Shankar2018-03-231-0/+3
* soc/intel/cannonlake: Disable RTC write protectCaveh Jalali2018-03-141-0/+3
* soc/intel/cannonlake: Add more HDA Audio Link settingsLijian Zhao2018-02-221-0/+9
* soc/intel/cannonlake: Add support for EMMC DLL updateLijian Zhao2018-02-081-0/+6
* soc/intel/cannonlake: CannonaLake make use of FVI informationSubrata Banik2018-01-311-0/+3
* soc/intel/cannonlake: Add support for C state and P stateShaunak Saha2017-10-261-0/+1
* soc/intel/cannonlake: Update PCIE CLKREQ programingLijian Zhao2017-10-181-1/+15
* soc/intel/*lake: Load vbt when it's neededPatrick Georgi2017-10-091-6/+1
* soc/intel/common: refactor locate_vbt and vbt_getPatrick Georgi2017-10-061-9/+1
* soc/intel/cannonlake: Add FSP GOP supportAbhay kumar2017-09-271-0/+17
* device: acpi_name() should take a const struct deviceAaron Durbin2017-09-141-1/+1
* soc/intel/cannonlake: Add serialio device configLijian Zhao2017-09-131-0/+40
* soc/intel/cannonlake: Add common ACPI support for CNLLijian Zhao2017-09-131-0/+65
* soc/intel/cannonlake: Init UPD params based on configPratik Prajapati2017-08-251-0/+68
* intel/cannonlake/chip: Add initial PCI enum supportPratik Prajapati2017-08-171-1/+30
* soc/intel/cannonlake: Call into FSP siliconinitLijian Zhao2017-08-151-0/+59
* Revert "soc/intel/cannonlake: Call into FSP siliconinit"Martin Roth2017-07-211-59/+0
* soc/intel/cannonlake: Call into FSP siliconinitLijian Zhao2017-07-211-0/+59
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