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path: root/src/soc/intel/cannonlake
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* soc/intel/cannonlake: Fix DMAR when no iGPU is presentPatrick Rudolph2020-07-311-8/+11
* soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabledFelix Singer2020-07-281-5/+1
* src: Update bare access to BOOL CONFIG_ vals to CONFIG()Martin Roth2020-07-262-4/+4
* cpu,soc/intel: Drop select SMPKyösti Mälkki2020-07-261-1/+0
* src: Remove unused 'include <cbmem.h>'Elyes HAOUAS2020-07-261-1/+0
* soc/intel/cannonlake: Move tco_configure to bootblockTim Wawrzynczak2020-07-222-4/+4
* src: Use ACPI macrosElyes HAOUAS2020-07-211-1/+1
* soc/intel/cannonlake: Add configs for USB 3.1 Gen2 EV settingsJamie Chen2020-07-202-0/+81
* src: Remove unused 'include <stdint.h>Elyes HAOUAS2020-07-141-1/+0
* soc/intel: Drop unused `#include <reg_script.h>`Angel Pons2020-07-062-2/+0
* soc/intel/cannonlake: make satahotplug user configurable via devicetreeJonas Loeffelholz2020-07-012-0/+5
* soc/intel/cannonlake: Add UWES ASL into xhci.aslEdward O'Callaghan2020-06-301-0/+73
* ACPI: Drop typedef global_nvs_tKyösti Mälkki2020-06-301-1/+2
* src: Remove whitespaces before tabsElyes HAOUAS2020-06-301-1/+1
* soc/intel/common: add TCC activation functionalitySumeet R Pawnikar2020-06-281-20/+1
* soc/intel/cannonlake: Add PchPmPwrCycDur to chip optionsSridhar Siricilla2020-06-252-0/+144
* soc/intel/cannonlake: Add missing USB_PORT_WAKE_ENABLE defineEdward O'Callaghan2020-06-251-0/+7
* soc/intel/cannonlake: Enable FSP-S compressionKarthikeyan Ramasubramanian2020-06-181-0/+1
* soc/intel: remove unused dptf.asl file and other definesSumeet R Pawnikar2020-06-181-32/+0
* soc/intel/cannonlake/vr_config: Add CFL defaults to TDC powerlimitPatrick Rudolph2020-06-171-4/+79
* soc/intel/cannonlake: Use table instead of switch-casePatrick Rudolph2020-06-172-417/+439
* cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki2020-06-161-1/+1
* soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki2020-06-161-1/+1
* arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki2020-06-161-3/+1
* soc/intel/cannonlake/acpi: Capitalize hex number to unify with SkylakePaul Menzel2020-06-141-1/+1
* soc/intel/cannonlake: Put braces around *else* branchPaul Menzel2020-06-101-1/+2
* ACPI: Remove Kconfig COMMON_FADTKyösti Mälkki2020-06-101-1/+0
* soc/intel/common/{pch,sata}: Remove SATA common code driverSubrata Banik2020-06-021-1/+0
* soc/intel/cannonlake: Add RP configuration settingsChristian Walter2020-06-022-1/+36
* soc/intel/*/bootblock/cpu.c: Drop unused includesElyes HAOUAS2020-06-021-1/+0
* src: Remove unused '#include <cpu/x86/lapic.h>'Elyes HAOUAS2020-06-021-1/+0
* soc/intel/common: Improve Type16 SMBIOS tablesPatrick Rudolph2020-05-281-0/+14
* soc/intel/gma: Implement fsp_soc_get_igd_bar() in common codeNico Huber2020-05-272-14/+0
* soc/intel/gma: Move DDI-A 4-lane config to common codeNico Huber2020-05-272-17/+3
* soc/intel/gma: Move display and opregion init to common codeNico Huber2020-05-271-33/+0
* drivers/intel/gma: Move IGD OpRegion to CBMEMNico Huber2020-05-271-16/+2
* cannonlake: update processor power limits configurationSumeet R Pawnikar2020-05-266-214/+18
* soc/intel/cannonlake: Add VrPowerDeliveryDesign to chip optionsChristian Walter2020-05-262-0/+8
* intel/cannonlake: Implement PCIe RP devicetree updateNico Huber2020-05-261-0/+20
* src: Remove unused 'include <string.h>'Elyes HAOUAS2020-05-181-1/+0
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* soc/intel: Drop ABOVE_4GB_MEM_BASE_SIZE and use cpu_phys_address_size()Furquan Shaikh2020-05-141-2/+0
* soc/intel/common/block/systemagent: Use TOUUD as base for MMIO above 4GFurquan Shaikh2020-05-141-1/+0
* device/pci_device: Extract pci_domain_set_resources from SOCRaul E Rangel2020-05-121-5/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-1189-89/+0
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-091-9/+1
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-0612-144/+12
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-0612-24/+12
* soc/intel/cannonlake: Add DisableHeciRetry to configChristian Walter2020-05-042-0/+5
* acpi: Move ACPI table support out of arch/x86 (3/5)Furquan Shaikh2020-05-023-4/+4
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