summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/common/block/sata
Commit message (Expand)AuthorAgeFilesLines
* soc/intel/skylake: Assign device ops in chipset devicetreeNico Huber2022-09-151-4/+1
* soc/intel/common/sata: Add APL and GLK SATA PCI IDsSean Rhodes2022-07-291-0/+2
* soc/intel: Add Raptor Lake device IDsBora Guvendik2022-05-161-0/+2
* soc/intel/common: Include Meteor Lake device IDsWonkyu Kim2022-03-091-0/+1
* src: Make PCI ID define names shorterFelix Singer2022-03-071-52/+52
* soc/intel/common: Add TGL-H PCI IDsJeremy Soller2021-08-191-0/+1
* soc/intel/common/sata: Add support for Cannon Lake SATA (HALO)Erik van den Bogaert2021-02-011-0/+1
* soc/intel/commmon: Include Alder Lake device IDsVarshit Pandya2021-01-221-0/+3
* soc/intel/common/block: Use pci_dev_request_bus_master for BM enablingSubrata Banik2020-09-141-7/+1
* soc/intel/common/block/sata: Add common SATA driverSubrata Banik2020-08-123-0/+80
* soc/intel/common/{pch,sata}: Remove SATA common code driverSubrata Banik2020-06-023-117/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/common: Fix 16-bit read/write PCI_COMMAND registerElyes HAOUAS2020-05-011-2/+1
* soc/intel/common: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc: Remove copyright noticesPatrick Georgi2020-03-181-1/+0
* soc/intel/common: Update Jasper Lake Device IDsMeera Ravindranath2020-02-251-1/+2
* soc/intel/common: Add Elkhartlake Device IDsTan, Lean Sheng2020-01-221-0/+1
* soc/intel/common: Add PCI device IDs for CMP-HGaggery Tsai2019-12-131-0/+3
* soc/intel/common: Add Jasperlake Device IDsrkanabar2019-12-101-0/+1
* soc/intel/common: Include Tigerlake device IDsRavi Sarawadi2019-11-051-0/+4
* soc/intel/skylake: Add Lewisburg family PCH supportMaxim Polyakov2019-09-061-0/+12
* soc/intel/common/block/sata: Convert DWORD width Read/Write to BYTE widthSubrata Banik2019-07-061-4/+4
* coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)Julius Werner2019-03-081-1/+1
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-0/+1
* device/pci: Fix PCI accessor headersKyösti Mälkki2019-03-011-0/+1
* soc/intel/common: Include cometlake PCH IDsRonak Kanabar2019-02-261-1/+4
* soc/{amd,intel}: Remove needless '&' on function pointersElyes HAOUAS2019-01-231-3/+3
* soc/intel/common: Include Icelake device IDsAamir Bohra2018-11-071-0/+1
* src/soc/intel: Add new device IDs to support coffeelakeMaulik2018-08-101-0/+2
* soc/intel/common/block: Fix SATA chipset register definitions anomaliesSubrata Banik2018-02-072-7/+20
* soc/intel/common/block: Add option to have subsystem_id in common pci driverSubrata Banik2017-12-131-2/+3
* soc/intel/skylake: Enable bus master for sataKane Chen2017-10-121-0/+5
* soc/intel/common: Add Cannonlake pci ids for commonLijian Zhao2017-08-041-0/+3
* Fix files with multiple newlines at the end.Martin Roth2017-07-241-1/+0
* soc/intel/common: Add Intel SATA common code supportAamir Bohra2017-05-223-0/+80
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 12:20:25 +0000