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* Change all assert(0) to BUG()Julius Werner2020-08-031-1/+1
* smbios: Fix type 17 for Windows 10Patrick Rudolph2020-07-301-53/+34
* src: Never set ISA Enable on PCI bridgesAngel Pons2020-07-281-3/+2
* soc/intel/common/basecode: Implement CSE update flowRizwan Qureshi2020-07-262-20/+316
* src/soc/intel: Add include <types.h>Elyes HAOUAS2020-07-261-1/+1
* soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIGMaxim Polyakov2020-07-261-10/+0
* soc/intel/common/hda: Add HDA ID for Jasper Lakeyan.liu2020-07-261-0/+1
* src: Change BOOL CONFIG_ to CONFIG() in comments & stringsMartin Roth2020-07-262-2/+2
* soc/intel/tigerlake: Update Tiger Lake SA IDsDerek Huang2020-07-251-3/+3
* soc/intel/common/gpio_defs: Remove unused macro for NFMaxim Polyakov2020-07-241-6/+0
* soc/intel/common/gpio_defs: Undo set TxDRxE in GPI_TRIG_OWN()Maxim Polyakov2020-07-241-1/+1
* soc/intel/common/gpio_defs: Improve some GPI macrosMaxim Polyakov2020-07-241-8/+9
* src: Use ACPI macrosElyes HAOUAS2020-07-211-2/+2
* src: Report word-sized access for PM1a_EVTAngel Pons2020-07-201-1/+1
* src: Make HAVE_CF9_RESET set the FADT reset registerAngel Pons2020-07-201-8/+2
* src: Drop useless cache flush settings in FADTAngel Pons2020-07-201-2/+0
* src: Never overwrite `fadt->flags`Angel Pons2020-07-201-4/+4
* src: Drop useless PM1b settings from FADTAngel Pons2020-07-201-7/+0
* src: Drop useless GPE1 settings from FADTAngel Pons2020-07-201-2/+0
* soc/intel/common/gpio_defs: Fix coding styleMaxim Polyakov2020-07-191-116/+125
* soc/intel/common/block/pmc: Select PMC on mainboard basisTim Chu2020-07-161-1/+7
* PCI IDs: Add PCI ID for JSL DPTF/DTT PCI deviceTim Wawrzynczak2020-07-151-0/+1
* src: Remove unused 'include <cpu/x86/msr.h>'Elyes HAOUAS2020-07-141-1/+0
* src: Remove unused 'include <stdint.h>Elyes HAOUAS2020-07-142-2/+0
* soc/intel/gpio: Convert PAD_CFG0_ROUTE_* to PAD_IRQ_ROUTE()Maxim Polyakov2020-07-121-3/+4
* soc/intel/gpio: Convert PAD_CFG0_RX_POL_* to PAD_RX_POL()Maxim Polyakov2020-07-121-3/+4
* intel/gpio: Convert PAD_CFG0_TRIG_* to PAD_TRIG()Maxim Polyakov2020-07-121-9/+10
* soc/intel/common/block/pcie: Select ASPM on mainboard basisChristian Walter2020-07-121-2/+10
* soc/intel/tigerlake: Add new IGD deviceRavi Sarawadi2020-07-121-0/+1
* soc/intel/common/block: Add new block DTTTim Wawrzynczak2020-07-073-0/+31
* soc/intel/common: Add a minimal PCI driver for IPUTim Wawrzynczak2020-07-073-0/+28
* soc/intel/common: Only touch Time Window Tau bits in supported SoCsTim Wawrzynczak2020-07-031-1/+9
* soc/intel/tigerlake: Switch to CSE Lite RW at BS_DEV_INIT_CHIPS entryJamie Ryu2020-07-011-0/+4
* soc/intel/common/cpu: Don't set any TCC settings if offset is 0Tim Wawrzynczak2020-07-011-1/+6
* ACPI GNVS: Replace uses of smm_get_gnvs()Kyösti Mälkki2020-07-012-10/+0
* ACPI: Drop typedef global_nvs_tKyösti Mälkki2020-06-3012-36/+20
* soc/intel/common: add TCC activation functionalitySumeet R Pawnikar2020-06-282-0/+24
* drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1Jonathan Zhang2020-06-251-1/+1
* src: Report byte-sized access for GPE0Angel Pons2020-06-241-1/+1
* ACPI: Replace smm_setup_structures()Kyösti Mälkki2020-06-242-20/+1
* ACPI: Replace uses of CBMEM_ID_ACPI_GNVSKyösti Mälkki2020-06-242-3/+4
* device/smbus_host: Declare common early SMBus prototypesKyösti Mälkki2020-06-223-16/+19
* cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki2020-06-161-1/+1
* soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki2020-06-161-1/+11
* sb/intel: Remove spurious HAVE_SMI_HANDLER testKyösti Mälkki2020-06-161-1/+1
* arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki2020-06-161-3/+1
* arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki2020-06-151-1/+0
* soc/intel/common: Replace cse_bp and ME with cse_lite in all console logsSridhar Siricilla2020-06-101-20/+22
* acpi,soc/intel: Make soc/motherboard_fill_fadt() globalKyösti Mälkki2020-06-072-9/+0
* src: Remove unused 'include <cpu/x86/mtrr.h>'Elyes HAOUAS2020-06-063-3/+0