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path: root/src/soc/intel/icelake/romstage
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* tree: Drop Intel Ice Lake supportFelix Singer2023-01-194-238/+0
* soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fillDavid Milosevic2022-11-171-1/+2
* soc/intel: Rename heci_init to cse_initSubrata Banik2022-06-041-1/+1
* soc/intel/icelake: Make use of is_devfn_enabled() functionSubrata Banik2021-06-231-15/+7
* soc/intel: Hook up `SOC_INTEL_DISABLE_IGD` to `InternalGfx` UPDAngel Pons2021-04-081-2/+2
* soc/intel: Drop `romstage_pch_init()` functionAngel Pons2021-03-013-13/+3
* soc/intel/{skl,icl}: Move tco_configure() to bootblockAngel Pons2021-03-011-4/+0
* soc/intel/icelake: Rename `pch_init()` functionAngel Pons2021-03-012-2/+2
* soc/intel: rename get_prmrr_sizeMichael Niewöhner2020-09-211-1/+1
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-181-3/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-115-5/+0
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-091-9/+1
* soc/intel/icelake: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-064-52/+8
* soc: Remove copyright noticesPatrick Georgi2020-03-185-5/+0
* soc/intel/icelake: Re-flow comment for 96 charactersPaul Menzel2020-03-151-4/+1
* soc/intel/icelake: Correct past participle in commentPaul Menzel2020-03-151-1/+1
* soc/intel/{icl,jsl,tgl}: Enable PlatformDebugConsent by KconfigSubrata Banik2020-03-011-1/+1
* vendorcode/intel: Remove Ice Lake FSP BindingsJohanna Schander2020-02-111-0/+7
* soc/intel/icelake: Refactor pch_early_init() codeSubrata Banik2019-11-073-0/+30
* soc/intel/sgx: convert SGX and PRMRR devicetree options to KconfigMichael Niewöhner2019-11-041-1/+2
* soc/intel: Replace config_of_path() with config_of_soc()Kyösti Mälkki2019-10-021-1/+1
* soc/intel: Rename <intelblocks/chip.h>Kyösti Mälkki2019-09-291-1/+1
* soc/intel: Move fill_postcar_frame to memmap.cKyösti Mälkki2019-08-281-16/+0
* soc/intel/{apl,cnl,dnv,icl,skl} : Use common cpu/intel/car/romstage.c codeSubrata Banik2019-08-271-0/+1
* intel/car: Use common TS_START_ROMSTAGEKyösti Mälkki2019-08-261-2/+0
* soc/intel: Use common romstage codeKyösti Mälkki2019-08-261-14/+6
* arch/x86: Add <arch/romstage.h>Kyösti Mälkki2019-08-221-0/+1
* soc/intel: Use config_of()Kyösti Mälkki2019-07-181-3/+3
* soc/intel/icelake: Update FSP UPDs if IGD is disable in devicetreeSubrata Banik2019-07-141-3/+14
* soc/intel/icelake: Make use of PCH_DEVFN_HDA macroSubrata Banik2019-07-141-1/+1
* soc/intel/icelake: Refer to soc/soc_chip.h rather than chip.hSubrata Banik2019-07-092-3/+2
* arch/x86: Adjust size of postcar stackKyösti Mälkki2019-07-041-1/+2
* soc/intel/icelake: Disable HDA based on devicetreeSubrata Banik2019-07-021-1/+3
* soc/intel: Provide SPD manufacturer ID and module type to SMBIOSDuncan Laurie2019-06-211-1/+3
* soc/intel/icelake: Pass FSP-M/S UPD as per ICL requirementAamir Bohra2019-06-091-1/+60
* src/soc/intel/common/smbios: Add addtional infos to dimm_infoChristian Walter2019-06-061-1/+5
* soc/intel: Fill DIMM serial number from SPDDuncan Laurie2019-05-181-0/+1
* soc/intel/icelake: Move power_state functions to pmutil.cSubrata Banik2019-05-022-87/+0
* soc/{amd,intel}/chip: Use local include for chip.hElyes HAOUAS2019-04-261-1/+2
* src: include <assert.h> when appropriateElyes HAOUAS2019-04-231-1/+0
* soc/intel/icelake: Fix chipset_power_state structureSubrata Banik2019-03-291-3/+1
* src: Use 'include <string.h>' when appropriateElyes HAOUAS2019-03-201-1/+0
* device/mmio.h: Add include file for MMIO opsKyösti Mälkki2019-03-041-1/+1
* arch/io.h: Drop unnecessary includeKyösti Mälkki2019-03-041-1/+0
* soc/intel: Add mem_rank info in SMBIOSFrancois Toguo2019-02-181-0/+1
* soc/intel/icelake: Don't use CAR_GLOBALArthur Heymans2019-02-132-4/+2
* soc/intel/common/block: Move tco common functions into block/smbusSubrata Banik2019-01-101-5/+3
* src: Remove unneeded include <cbmem.h>Elyes HAOUAS2018-11-161-1/+0
* soc/intel/icelake: Do initial SoC commitAamir Bohra2018-10-265-0/+329
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