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path: root/src/soc/intel/skylake/bootblock/cpu.c
Commit message (Expand)AuthorAgeFilesLines
* soc/intel: Drop `bootblock_cpu_init()` functionAngel Pons2021-03-011-9/+0
* soc/intel/*/bootblock/cpu.c: Drop unused includesElyes HAOUAS2020-06-021-1/+0
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-111-1/+0
* soc/intel/skylake: Use SPDX for GPL-2.0-only filesAngel Pons2020-04-061-13/+2
* soc: Remove copyright noticesPatrick Georgi2020-03-181-2/+0
* soc/intel/skylake: Remove unnecessary P-State and Flex Ratio assignmentBarnali Sarkar2017-07-011-73/+0
* soc/intel/skylake: Use CPU common library codeBarnali Sarkar2017-06-091-26/+7
* soc/intel/skylake: Move update microcode from cbfs to mp_ops callbacksBarnali Sarkar2017-06-091-2/+1
* soc/intel/skylake: Add config for cpu base clock frequencyAamir Bohra2017-06-051-1/+1
* soc/intel/common/block: add bios caching to fast spi moduleAaron Durbin2017-06-051-26/+1
* soc/intel/skylake: Clean up code by using common FAST_SPI moduleBarnali Sarkar2017-05-021-24/+7
* soc/intel/skylake: Use C entry code for MTRR programmingSubrata Banik2017-03-241-0/+26
* soc/intel/skylake: Clean up CPU codeSubrata Banik2017-03-061-1/+1
* soc/intel/skylake: Move bootblock specific code from skylake/romstageNaresh G Solanki2016-08-181-0/+26
* soc/intel/skylake: Add C entry bootblock supportSubrata Banik2016-07-281-62/+4
* intel/skylake: unconditionally set SPI controller BARAaron Durbin2016-02-041-17/+1
* intel/skylake: Remove check for Microcode loaded by MEMartin Roth2016-01-121-22/+1
* tree: drop last paragraph of GPL copyright headerPatrick Georgi2015-10-311-4/+0
* cpu/mtrr.h: Fix macro names for MTRR registersAlexandru Gagniuc2015-10-151-7/+7
* skylake: Leave SPI controller enabledLee Leahy2015-10-111-5/+0
* skylake: SPI code cleanupLee Leahy2015-10-111-4/+6
* skylake: fix garbled patch from upstreamAaron Durbin2015-08-131-13/+12
* Skylake: Fix microcode reload in bootblock cpu initRizwan Qureshi2015-07-291-1/+23
* soc/intel: Add Skylake SOC supportLee Leahy2015-07-161-25/+71
* soc/intel/skylake: Use Broadwell as comparision base for Skylake SOCLee Leahy2015-07-161-0/+142
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