coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	intel/skylake: Clean up USB configuration in devicetree	Duncan Laurie	2015-10-27	1	-20/+25
*	FSP 1.1: Replace soc_ prefix with fsp_	Lee Leahy	2015-10-27	1	-90/+90
*	intel/skylake: IRQ programming through UPD	Subrata Banik	2015-10-27	1	-0/+282
*	intel/skylake: FSP 1.7.0 MemoryInit/SiliconInit params update	Rizwan Qureshi	2015-10-27	1	-6/+24
*	intel/skylake: Create "RtcLock" Silicon UPD from coreboot	Barnali Sarkar	2015-09-17	1	-0/+3
*	fsp1_1: provide binding to UEFI version	Aaron Durbin	2015-09-10	1	-1/+1
*	skylake: Apply USB2 and USB3 port enable/disable settings	Duncan Laurie	2015-09-08	1	-11/+9
*	skylake: only generate ACPI cpu entries once	Aaron Durbin	2015-08-27	1	-0/+2
*	skylake: Update Memory and Silicon Init params	Rizwan Qureshi	2015-08-19	1	-1/+175
*	skylake: remove the redundant fspNotify in chip final.	robbie zhang	2015-07-29	1	-9/+0
*	soc/intel: Add Skylake SOC support	Lee Leahy	2015-07-16	1	-14/+51
*	soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC	Lee Leahy	2015-07-16	1	-0/+80