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path: root/src/soc/intel/skylake/include
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* soc/intel/skylake: Add support for all UART port indexSubrata Banik2017-08-211-2/+5
* soc/intel/skylake: Enable power button SMI when jumping to payloadFurquan Shaikh2017-08-191-0/+2
* soc/intel/{cannonlake,skylake}: fix PCH_P2SB_EPMASK macroAaron Durbin2017-08-151-1/+1
* soc/intel/skylake: Enable UART debug controller on S3 resumeFurquan Shaikh2017-08-101-1/+2
* soc/intel/skylake: Use common opregion implementationPatrick Rudolph2017-07-241-2/+0
* soc/intel/skylake: Rectify LPC Lock Enable (LE) bit definitionSubrata Banik2017-07-211-1/+1
* soc/intel/skylake: remove top_of_32bit_ram() declarationAaron Durbin2017-07-171-3/+0
* soc/intel/skylake: Set PsysPL2 MSRShelley Chen2017-07-141-0/+1
* Rename __attribute__((packed)) --> __packedStefan Reinauer2017-07-136-12/+19
* sgx: Move SGX code to intel/common/blockPratik Prajapati2017-07-102-5/+0
* soc/intel/skylake: Remove unnecessary P-State and Flex Ratio assignmentBarnali Sarkar2017-07-011-1/+0
* soc/intel/skylake: Use CPU MP Init Common codeBarnali Sarkar2017-06-231-12/+0
* soc/intel/skylake: Add missing PCH_DEV_* definitionsFurquan Shaikh2017-06-141-0/+6
* soc/intel/skylake: Enable ACPI PM timer emulation on all CPUsSubrata Banik2017-06-092-0/+7
* soc/intel/skylake: Use CPU common library codeBarnali Sarkar2017-06-092-17/+0
* soc/intel/skylake: Use common systemagent codeSubrata Banik2017-06-091-58/+0
* src: change coreboot to lowercaseMartin Roth2017-06-071-1/+1
* soc/intel/skylake: Use PCI IDs from device/pci_ids.hSubrata Banik2017-06-062-35/+0
* soc/intel/skylake: Add config for cpu base clock frequencyAamir Bohra2017-06-051-3/+0
* soc/intel/skylake: Add macro for setting GPIO interrupt trigger mode.Kane Chen2017-06-031-0/+6
* soc/intel/skylake: Add missing PCH_DEV_PCIE* definitionsFurquan Shaikh2017-05-271-0/+6
* soc/intel/skylake: Display FPF status of CSMEPratik Prajapati2017-05-221-0/+12
* intel/common/block/i2c: Add common block for I2C and use the same in SoCsRizwan Qureshi2017-05-181-28/+0
* soc/intel/skylake: Use intel/common/block/smbus codeAamir Bohra2017-05-093-24/+3
* soc/intel/skylake: remove unused SMI functionsAaron Durbin2017-05-081-6/+0
* soc/intel/skylake: Clean up code by using common FAST_SPI moduleBarnali Sarkar2017-05-025-310/+0
* soc/intel/skylake: Set xtal bypass on low power idleNaresh G Solanki2017-05-021-1/+2
* soc/intel/skylake: Add ID for Fizz i7Shelley Chen2017-05-011-0/+1
* soc/intel/skylake: Use ITSS common codeBora Guvendik2017-04-281-21/+3
* soc/intel/skylake: use postcar stage for fsp 2.0Aaron Durbin2017-04-251-1/+0
* soc/intel/skylake: Add ID's for Kabylake-RNaresh G Solanki2017-04-243-0/+4
* soc/intel/skylake: Use LPSS common libraryAamir Bohra2017-04-111-11/+0
* soc/intel/skylake: Use common PCR moduleSubrata Banik2017-04-104-128/+76
* soc/intel/skylake: Add support for GSPI controllerFurquan Shaikh2017-04-062-0/+11
* soc/intel/skylake: Clean up code by using common System Agent moduleSubrata Banik2017-03-283-12/+8
* soc/pci_devs.h: Use consistent naming in soc/pci_devs.hSubrata Banik2017-03-281-14/+14
* soc/intel/common/block: Add cache as ram init and teardown codeSubrata Banik2017-03-281-54/+0
* soc/intel/skylake: Add SGX initializationRobbie Zhang2017-03-232-3/+8
* soc/intel/skylake: Fix remaining issues detected by checkpatchLee Leahy2017-03-172-2/+2
* soc/intel/skylake: Add int to unsignedLee Leahy2017-03-175-15/+15
* intel/skylake: Support for setting AC/DC loadlineDuncan Laurie2017-03-151-0/+4
* intel/skylake: Fix bug in VR configuration with FSP 2.0Duncan Laurie2017-03-151-1/+15
* intel/skylake: nhlt: Add support for rt5514 NHLT blobDuncan Laurie2017-03-151-0/+5
* soc/intel/skylake: Add GPIO macros for IOxAPIC and SCILi Cheng Sooi2017-03-091-0/+11
* soc/intel/skylake: Add SKL SOC PCH H GPIO supportLi Cheng Sooi2017-03-093-194/+476
* intel/skylake: Add function to read state of Deep S5Duncan Laurie2017-03-081-0/+8
* soc/intel/skylake: Clean up CPU codeSubrata Banik2017-03-061-58/+2
* soc/intel/skylake: Clean up XHCI codeSubrata Banik2017-03-061-60/+0
* soc/intel/skylake: Fix broken suspend-resumeFurquan Shaikh2017-02-222-0/+2
* soc/intel/skylake: Expand USB OC pins definition to support PCH-HTeo Boon Tiong2017-02-201-0/+2
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