coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	soc/intel/xeon_sp: Enable FSP_ERROR_INFO_HOB handling	Tim Chu	2023-03-22	1	-0/+10
*	Revert "soc/intel/xeon_sp: Enable FSP_ERROR_INFO_HOB handling"	Elyes Haouas	2023-01-23	1	-3/+0
*	soc/intel/xeon_sp: Enable FSP_ERROR_INFO_HOB handling	Tim Chu	2023-01-23	1	-0/+3
*	soc/xeon_sp: Add weak mainboard_ewl_check for EWL check after FSP-M	Johnny Lin	2022-11-04	1	-0/+2
*	treewide: Remove unused <cpu/x86/mtrr.h>	Elyes Haouas	2022-07-20	1	-1/+0
*	soc/intel/xeon_sp: Use common cpu/intel romstage entry	Arthur Heymans	2020-11-05	1	-24/+1
*	soc/intel/xeon_sp/cpx: Add save_dimm_info for SMBIOS type 17	Johnny Lin	2020-10-08	1	-1/+2
*	soc/intel/xeon_sp: Add RTC failure checking	Jingle Hsu	2020-07-12	1	-0/+7
*	treewide: Remove "this file is part of" lines	Patrick Georgi	2020-05-11	1	-1/+0
*	treewide: replace GPLv2 long form headers with SPDX header	Patrick Georgi	2020-05-06	1	-12/+1
*	treewide: Move "is part of the coreboot project" line in its own comment	Patrick Georgi	2020-05-06	1	-2/+1
*	soc/intel/xeon_sp/cpx: Allow motherboards to set FSP-M parameters	Andrey Petrov	2020-04-24	1	-0/+5
*	soc/intel/xeon_sp: Refactor code to allow for additional CPUs types	Andrey Petrov	2020-03-26	1	-26/+2
*	soc: Remove copyright notices	Patrick Georgi	2020-03-18	1	-2/+0
*	soc/intel: Add Intel Xeon Scalable Processor support	Jonathan Zhang	2020-03-06	1	-0/+83