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* soc/intel/alderlake: Drop unreferenced `InternalGfx`Angel Pons2021-04-101-1/+0
* soc/intel/alderlake: Skip D3Cold for TBTSubrata Banik2021-04-101-0/+6
* mb/ocp/deltalake: Override DDR frequency limit via VPD variableTim Chu2021-04-091-0/+15
* soc/intel/dnv_ns: hook up new gpio device operationsMichael Niewöhner2021-04-082-0/+4
* soc/intel/{cannonlake,icelake}: Drop unhooked `SendVrMbxCmd`Angel Pons2021-04-082-14/+0
* soc/intel/skylake: Drop unnecessary `ignore_vtd` optionAngel Pons2021-04-085-13/+3
* soc/intel: Hook up `SOC_INTEL_DISABLE_IGD` to `InternalGfx` UPDAngel Pons2021-04-084-5/+7
* intel/tigerlake: Add Acoustic featuresShaunak Saha2021-04-062-15/+10
* soc/intel/common: Prevent SMI storm when setting SPI WPD bitAngel Pons2021-04-064-0/+31
* soc/intel/alderlake: Add LPC and IGD device Ids for Alderlake MMaulik V Vaghela2021-04-063-0/+5
* soc/intel/alderlake: Update variable SD3C to only track enabled devicesJohn Zhao2021-04-061-3/+7
* soc/intel/alderlake: Remove TCSS DMA _DSM methodJohn Zhao2021-04-061-5/+0
* device/dram/ddr3: Rename DDR3 SPD memory typesAngel Pons2021-04-051-6/+6
* device/dram/ddr3: Get rid of useless typedefsAngel Pons2021-04-051-1/+1
* soc/intel/alderlake: Enable logging of wake sources for S0ixSugnan Prabhu S2021-03-301-0/+2
* soc/intel/xeon_sp: Prepare for CBnT BPM generationArthur Heymans2021-03-302-2/+14
* soc/intel/alderlake: add processor power limits control supportSumeet R Pawnikar2021-03-283-1/+17
* soc/intel/common/gpio: Add function to get GPIO index in groupTim Wawrzynczak2021-03-282-0/+12
* soc/intel/common/systemagent: Add macros to access REGBAR spaceTim Wawrzynczak2021-03-281-0/+7
* soc/intel/tigerlake: Fix REG_BASE_SIZETim Wawrzynczak2021-03-281-1/+1
* soc/intel/common/tcss: Rename TCSS_DISPLAYTim Wawrzynczak2021-03-282-3/+3
* soc/intel/tigerlake: Move TCSS code to intel/common/blockTim Wawrzynczak2021-03-287-28/+27
* soc/intel: Rename and move MISCCFG_GPIO_PM_CONFIG_BITS definition to soc/gpio.hSubrata Banik2021-03-2723-19/+79
* soc/intel/common/block/gpio: Fix typecasting issueSubrata Banik2021-03-271-1/+1
* soc/intel/alderlake: Correct GPE DWx assignment as per EDSSubrata Banik2021-03-273-27/+19
* soc/intel/xeon_sp: Move PCH PCI device definesMarc Jones2021-03-263-105/+58
* soc/intel/alderlake: Add provision to override Rcomp settingsSubrata Banik2021-03-262-10/+26
* soc/intel/alderlake: Align RcompResistor definition as per MRCSubrata Banik2021-03-262-7/+5
* soc/intel/tigerlake: Add #include guards to soc/early_tcss.hTim Wawrzynczak2021-03-221-0/+5
* {lynxpoint/broadwell}: Set Azalia HDCFG.BCLD bitAngel Pons2021-03-221-0/+7
* {lynxpoint,broadwell}/hda_verb.c: Drop effect-free writeAngel Pons2021-03-221-4/+0
* soc/intel/broadwell: Use Lynx Point hda_verb.cAngel Pons2021-03-222-1/+4
* soc/intel/common/hda_verb.c: Fix up comment styleAngel Pons2021-03-221-2/+3
* util: Add DDR4 generic SPD for H4AAG165WB-BCWENick Vaccaro2021-03-221-0/+1
* lynxpoint/broadwell: Rename LP GPIO config globalAngel Pons2021-03-221-1/+1
* acpi/acpigen.h: Add more intuitive AML package closing functionsJakub Czapiga2021-03-222-3/+0
* soc/intel/xeon_sp/cpx: Set PCU locksMarc Jones2021-03-202-1/+58
* soc/intel/xeon_sp/: Fix SMI_LOCK settingMarc Jones2021-03-204-16/+14
* soc/intel: Drop unused `GPIO_NUM_GROUPS` macroAngel Pons2021-03-208-8/+0
* soc/intel/tgl: Add configurable value for PmcUsb2PhySusPgEnableDerek Huang2021-03-192-0/+5
* soc/intel/block/cpu/mp_init.c: Remove weak functionsArthur Heymans2021-03-181-11/+0
* spd_bin: Replace get_spd_cbfs_rdev() with spd_cbfs_map()Julius Werner2021-03-174-23/+15
* soc/intel/alderlake: Enable CSE Lite driver for ADL platform in romstageSridhar Siricilla2021-03-171-1/+10
* cbfs: Remove prog_locate() for stages and rmodulesJulius Werner2021-03-162-10/+0
* soc/intel/alderlake: Drop 100ms delay and do not poll Link ActiveJohn Zhao2021-03-151-14/+0
* soc/intel/tigerlake: Remove obsolete CNVi Bluetooth PCI deviceCliff Huang2021-03-153-4/+0
* soc/intel/alderlake: Remove obsolete CNVi Bluetooth PCI deviceCliff Huang2021-03-152-3/+0
* soc/intel/alderlake: Add CNVi Bluetooth flag at devicetree entryCliff Huang2021-03-152-6/+8
* soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entryCliff Huang2021-03-152-8/+9
* pciexp_device: Rewrite LTR configurationNico Huber2021-03-152-12/+8
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