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* soc/nvidia/tegra210: Remove trailing semicolonsElyes Haouas2022-09-302-2/+2
* soc/nvidia/tegra124/sor.c: Remove trailing semicolonElyes Haouas2022-09-301-1/+1
* timer: Change timer util functions to 64-bitRob Barnes2022-09-141-1/+1
* src: remove force-included header rules.h from individual filesMartin Roth2022-09-061-1/+0
* arch/arm64,arm: Prepare for !SEPARATE_ROMSTAGEArthur Heymans2022-07-201-2/+8
* mb/qemu-i440fx,soc/nvidia: Fix coverity reported defectsKyösti Mälkki2022-07-041-3/+3
* soc/nvidia/tegra124: Do resource transitionKyösti Mälkki2022-06-301-9/+4
* soc/nvidia/tegra210: Do resource transitionKyösti Mälkki2022-06-261-5/+3
* src/soc: Get rid of most src/soc/Kconfig filesMartin Roth2022-06-241-2/+0
* device/resource: Add _kb postfix for resource allocatorsKyösti Mälkki2022-06-222-6/+6
* soc/*: Use __fallthrough statementArthur Heymans2022-05-111-1/+1
* src: Remove unused <console/cbmem_console.h>Elyes HAOUAS2022-04-241-1/+0
* Use the fallthrough statement in switch loopsArthur Heymans2022-02-162-7/+8
* treewide: Remove "ERROR: "/"WARN: " prefixes from log messagesJulius Werner2022-02-074-4/+4
* soc/nvidia/tegra124/sor.c: Remove unuseful 'return' in void functionElyes HAOUAS2022-02-011-2/+0
* soc/nvidia/tegra210/sor.c: Remove unuseful 'return' in void functionElyes HAOUAS2022-02-011-2/+0
* soc/nvidia,qualcomm: Fix indirect includesKyösti Mälkki2021-11-092-9/+1
* src/soc to src/superio: Fix spelling errorsMartin Roth2021-10-058-9/+9
* drivers/gic: Remove unnecessary codeJulius Werner2021-10-014-20/+0
* mipi: Make panel init callback work directly on DSI transaction typesJulius Werner2021-09-112-111/+7
* soc/nvidia/tegra124: Increase bootblock sizeArthur Heymans2021-07-261-2/+2
* cbfs: Replace more instances of cbfs_boot_locate() with newer APIsJulius Werner2021-03-171-16/+3
* src: Remove useless comments in "includes" linesElyes HAOUAS2021-02-041-1/+1
* soc/nvidia/tegra124/spi.c: Remove repeated wordElyes HAOUAS2021-01-181-1/+1
* soc/nvidia/tegra210/spi.c: Remove repeated wordElyes HAOUAS2021-01-181-1/+1
* Makefile: Add $(xcompile) to specify where to write xcompileRaul E Rangel2020-12-232-2/+6
* drivers: Replace set_vbe_mode_info_validPatrick Rudolph2020-12-172-22/+12
* cbfs: Enable CBFS mcache on most chipsetsJulius Werner2020-12-022-2/+4
* soc/nvidia/tegra124/include/soc/clk_rst.h: Remove extra tabElyes HAOUAS2020-11-091-1/+1
* soc/nvidia: Drop unneeded empty linesElyes HAOUAS2020-09-2218-76/+0
* include/console/uart: make index parameter unsignedFelix Held2020-09-122-10/+10
* {include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistentSubrata Banik2020-09-013-9/+9
* {intel/gma,include/device}: Delete unused 'drm_dp_helper.h' fileElyes HAOUAS2020-08-311-1/+0
* src: Remove unused 'include <stddef.h>Elyes HAOUAS2020-08-182-2/+0
* src: Remove unused 'include <boot_device.h>'Elyes HAOUAS2020-08-182-2/+0
* src: Remove unused 'include <stdint.h>Elyes HAOUAS2020-07-146-6/+0
* treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh2020-06-134-0/+8
* src: Remove redundant includesElyes HAOUAS2020-06-024-4/+1
* src: Remove unused 'include <symbols.h>'Elyes HAOUAS2020-06-022-2/+0
* src: Remove leading blank lines from SPDX headerElyes HAOUAS2020-05-182-6/+0
* soc/nvidia/tegra124: add resources during read_resources()Furquan Shaikh2020-05-141-3/+2
* treewide: Replace BSD-3-Clause and ISC headers with SPDX headersPatrick Georgi2020-05-111-25/+1
* treewide: Remove "this file is part of" linesPatrick Georgi2020-05-11133-133/+0
* src/: Replace GPL boilerplate with SPDX headersPatrick Georgi2020-05-092-20/+2
* soc/nvidia: Replace GPLv2 long form headers with SPDX headerElyes HAOUAS2020-05-082-22/+4
* treewide: replace GPLv2 long form headers with SPDX headerPatrick Georgi2020-05-062-22/+2
* treewide: move copyrights and authors to AUTHORSPatrick Georgi2020-05-062-8/+0
* treewide: Move "is part of the coreboot project" line in its own commentPatrick Georgi2020-05-063-6/+3
* Replace DEVICE_NOOP with noop_(set|read)_resourcesNico Huber2020-04-102-3/+3
* Drop unnecessary DEVICE_NOOP entriesNico Huber2020-04-101-2/+0
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