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* arch/x86/ioapic: Select IOAPIC with SMPKyösti Mälkki2021-10-2214-14/+0
* sb,soc/intel: Replace set_ioapic_id() with setup_ioapic()Kyösti Mälkki2021-10-223-3/+3
* sb,soc/intel: Set IOAPIC max entries before APIC IDKyösti Mälkki2021-10-223-6/+6
* sb,soc/intel: Set IOAPIC redirection entry countKyösti Mälkki2021-10-223-29/+9
* soc/intel/braswell: use mp_cpu_bus_initFelix Held2021-10-223-5/+3
* soc/intel/baytrail: use mp_cpu_bus_initFelix Held2021-10-223-5/+3
* cpu/x86/mp_init: move printing of failure message into mp_init_with_smmFelix Held2021-10-2216-32/+32
* cpu/x86/mp_init: use cb_err as status return type in remaining functionsFelix Held2021-10-225-8/+13
* soc/amd/common/block/cpu/smm/finalize: simplify finalize_coresFelix Held2021-10-211-3/+1
* soc/intel/skylake/cpu: rework failure handling in post_mp_initFelix Held2021-10-211-5/+8
* cpu/x86/mp_init: use cb_err as mp_init_with_smm return typeFelix Held2021-10-2116-17/+32
* acpigen,soc/amd,cpu/intel: rework static DWORD for CPPC tableMichael Niewöhner2021-10-212-21/+22
* soc/amd/common/block/cpu: Remove magic number in memlayoutRaul E Rangel2021-10-201-2/+2
* soc/intel/alderlake: Fix wrong FIVR configs assignmentBora Guvendik2021-10-201-1/+1
* psp_verstage: remove psp_ef_table structKangheui Won2021-10-204-18/+8
* soc/intel/{skl,apl}: don't run or even include SGX code if disabledMichael Niewöhner2021-10-205-6/+4
* soc/intel/skl: Constify `soc_get_cstate_map()`Patrick Georgi2021-10-191-1/+1
* soc/intel/common/block/cse: Use newly added `create-cse-region`Furquan Shaikh2021-10-191-12/+5
* soc/intel/common/cse: Support RW update when stitching CSE binaryFurquan Shaikh2021-10-192-5/+9
* soc/intel/alderlake: Enable support for CSE stitchingFurquan Shaikh2021-10-192-0/+30
* soc/intel/common/cse: Add support for stitching CSE componentsFurquan Shaikh2021-10-193-0/+170
* soc/intel: Constify `soc_get_cstate_map()`Angel Pons2021-10-1911-13/+13
* acpi/acpigen: Constify CST functions' pointersAngel Pons2021-10-194-4/+4
* soc/intel/*/acpi.c: Don't copy structs with `memcpy()`Angel Pons2021-10-196-6/+6
* soc/amd/common/block/include/psp_efs: don't typedef structFelix Held2021-10-192-3/+3
* soc/amd/common/block/include/psp_efs: rename embedded_firmware elementsFelix Held2021-10-191-2/+2
* sc7280: Add GSI FW download supportRavi Kumar Bokka2021-10-181-0/+8
* ACPI: Have common acpi_fill_mcfg()Kyösti Mälkki2021-10-187-57/+0
* intel/tigerlake: Add missing IRQ for CNViSean Rhodes2021-10-181-0/+1
* soc/skylake: Make VT-d controllable from CMOS optionSean Rhodes2021-10-184-5/+10
* soc/intel/skylake: switch to common ACPI codeMichael Niewöhner2021-10-178-425/+63
* soc/intel/{common,apl,glk}: guard PM Timer option on SoCs w/o PM TimerMichael Niewöhner2021-10-172-0/+7
* soc/intel/*: only enable PM Timer emulation if the PM Timer is disabledMichael Niewöhner2021-10-171-1/+1
* soc/intel: transition full control over PM Timer from FSP to corebootMichael Niewöhner2021-10-177-2/+66
* soc/intel/{skl,cnl,dnv}: disable PM ACPI timer if chosenMichael Niewöhner2021-10-175-0/+32
* soc/intel: implement ACPI timer disabling per SoC and drop common codeMichael Niewöhner2021-10-1713-28/+5
* soc/intel: move disabling of PM Timer to SoC PMC codeMichael Niewöhner2021-10-1710-45/+45
* soc/intel/common: add possiblity to override GPE0 to acpi_fill_soc_wakeMichael Niewöhner2021-10-172-8/+10
* soc/intel/common/acpi: drop `RTC_EN` from static wake bits maskMichael Niewöhner2021-10-171-1/+1
* soc/intel: deduplicate acpi_fill_soc_wakeMichael Niewöhner2021-10-178-105/+1
* soc/intel/skylake: switch to common GNVSMichael Niewöhner2021-10-172-91/+1
* soc/intel/common: add SGX fields to GNVSMichael Niewöhner2021-10-172-0/+7
* soc/amd/stoneyridge/include/iomap: rename I2C[ABCD]_BASE_ADDRESS definesFelix Held2021-10-164-16/+16
* soc/intel/dnv_ns: enable uCode PM Timer emulationMichael Niewöhner2021-10-162-0/+3
* soc/intel/pmc: add a note about legacy OSes/payloads to PM Timer KconfigMichael Niewöhner2021-10-161-0/+7
* soc/intel/{common,skl}: set ACPI_FADT_PLATFORM_CLOCK based on KconfigMichael Niewöhner2021-10-162-4/+8
* soc/amd/common: move configure_espi_with_mb_hook implementationFelix Held2021-10-152-5/+8
* soc/amd: make configure_espi_with_mb_hook call conditionalFelix Held2021-10-153-10/+13
* soc/amd/common/include/espi: rename configure_espiFelix Held2021-10-153-3/+3
* soc/amd/stoneyridge/acpi/sb_fch: use I2C[ABCD]_BASE_ADDRESS definesFelix Held2021-10-151-4/+4
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