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path: root/src/southbridge/intel/bd82x6x/lpc.c
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* intel SMI handlers: Refactor GPI SMI/SCI routingKyösti Mälkki2015-04-281-1/+1
* southbridge/intel/bd82x6x: Add LPC id 0x1e49 for B75 chipsetDamien Zammit2015-04-201-1/+1
* x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointerKevin Paul Herbert2015-02-151-4/+4
* sandy/ivy/nehalem: Remerge interrupt handlingVladimir Serbinenko2014-11-231-24/+19
* i82801ix,bd82x6x,ibexpeak: rewrite expresscard hotplugVladimir Serbinenko2014-11-191-0/+10
* ibexpeak, bd82x6x: Move to implicit length patchingVladimir Serbinenko2014-11-091-5/+3
* bd82x6x: Move to common FADT.Vladimir Serbinenko2014-11-081-0/+134
* cmos: Rename the CMOS related functions.Gabe Black2014-10-221-1/+1
* bd82x6x: Consolidate common GNVS initVladimir Serbinenko2014-10-171-0/+9
* bd82x6x, ibexpeak, lynxpoint: Declare NVSA before its use.Vladimir Serbinenko2014-10-111-5/+3
* bd82x6x, ibexpeak, lynxpoint: Ensure 0-filling of uninited GNVS vars.Vladimir Serbinenko2014-10-101-0/+4
* southbridge/bd82x6x: Reserve 16 MiB for flash and not 8.Vladimir Serbinenko2014-09-131-2/+5
* Move nehalem/sandy/ivy to per-device acpiVladimir Serbinenko2014-09-111-0/+31
* southbridge: Trivial - drop trailing blank lines at EOFEdward O'Callaghan2014-07-081-2/+0
* intel boards: Use acpi_is_wakeup_s3()Kyösti Mälkki2014-06-211-1/+1
* Intel BD82x6x: LPC: Unify I/O APIC setupPaul Menzel2013-06-031-31/+17
* Intel Panther Point PCH: Use 2 << 24 to clarify that APIC ID is 2Vladimir Serbinenko2013-04-161-2/+2
* GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«Paul Menzel2013-03-011-1/+1
* Reserve bd82x6x LPC decode ranges in the resource allocatorMarc Jones2012-07-261-2/+37
* ELOG: Log boot-time events found in southbridgeDuncan Laurie2012-07-251-0/+4
* CougarPoint/PantherPoint: Add HM77 device ID to tableKimarie Hoot2012-07-251-5/+4
* Add specific power management init code for PantherPointDuncan Laurie2012-07-241-2/+56
* bd82x6x: Convert all PCI ID lists to new schemeStefan Reinauer2012-07-241-89/+13
* Add support for HM70 and NM70 LPC bridgeStefan Reinauer2012-07-241-0/+10
* Don't disable ACPI in the S3 resume pathDuncan Laurie2012-05-011-6/+9
* add new LPC controller device ID valueVadim Bendebury2012-05-011-0/+5
* Add support for Intel Panther Point PCHStefan Reinauer2012-04-041-0/+678
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