coreboot.git - Coreboot firmware sources

	Commit message (Expand)	Author	Age	Files	Lines
*	nb/sb/cpu: Drop Intel Rangeley support	Arthur Heymans	2019-11-21	1	-195/+0
*	intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor	Kyösti Mälkki	2019-08-21	1	-0/+1
*	intel/fsp_rangeley: Avoid preprocessor with HAVE_SMI_HANDLER	Kyösti Mälkki	2019-07-13	1	-3/+0
*	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	Julius Werner	2019-03-08	1	-1/+1
*	device/pci: Fix PCI accessor headers	Kyösti Mälkki	2019-03-01	1	-0/+1
*	ACPI: Rename FADT model and set it to zero	Elyes HAOUAS	2019-03-01	1	-1/+1
*	ACPI: Correct asl_compiler_revision value	Elyes HAOUAS	2019-02-21	1	-1/+2
*	device: Use pcidev_path_on_root()	Kyösti Mälkki	2019-01-06	1	-1/+1
*	soc/intel: Fix ugly preprocessor macro	Kyösti Mälkki	2018-12-30	1	-1/+1
*	arch/acpi.h: Add some update to version 6.2a	Elyes HAOUAS	2018-11-29	1	-4/+2
*	update all FADT version 3.0 to use the get tables function	Marc Jones	2018-08-27	1	-1/+1
*	tree: drop last paragraph of GPL copyright header	Patrick Georgi	2015-10-31	1	-4/+0
*	Revert "Remove FSP Rangeley SOC and mohonpeak board support"	Martin Roth	2015-10-14	1	-0/+201
*	Remove FSP Rangeley SOC and mohonpeak board support	Alexandru Gagniuc	2015-10-03	1	-201/+0
*	Remove address from GPLv2 headers	Patrick Georgi	2015-05-21	1	-1/+1
*	southbridge/intel/fsp_rangeley/ : Spellcheck + Formatting	nicky sielicki	2015-04-10	1	-1/+1
*	southbridge/intel: Add fsp_rangeley support	Martin Roth	2014-07-30	1	-0/+201