summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/jasperlake/include/soc/usb.h
blob: 247b0ba5546ea8f90e7208df86f7bdcf9b3260eb (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
/* SPDX-License-Identifier: GPL-2.0-only */


#ifndef _SOC_USB_H_
#define _SOC_USB_H_

#include <stdint.h>

/* Per Port HS Transmitter Emphasis */
#define USB2_EMP_OFF			0
#define USB2_DE_EMP_ON			1
#define USB2_PRE_EMP_ON			2
#define USB2_DE_EMP_ON_PRE_EMP_ON	3

/* Per Port Half Bit Pre-emphasis */
#define USB2_FULL_BIT_PRE_EMP	0
#define USB2_HALF_BIT_PRE_EMP	1

/* Per Port HS Preemphasis Bias */
#define USB2_BIAS_0MV		0
#define USB2_BIAS_11P25MV	1
#define USB2_BIAS_16P9MV	2
#define USB2_BIAS_28P15MV	3
#define USB2_BIAS_39P35MV	5
#define USB2_BIAS_45MV		6
#define USB2_BIAS_56P3MV	7

struct usb2_port_config {
	uint8_t enable;
	uint8_t ocpin;
	uint8_t tx_bias;
	uint8_t tx_emp_enable;
	uint8_t pre_emp_bias;
	uint8_t pre_emp_bit;
};

/* USB Overcurrent pins definition */
enum {
	OC0 = 0,
	OC1,
	OC2,
	OC3,
	OC4,
	OC5,
	OC6,
	OC7,
	OCMAX,
	OC_SKIP = 0xff, /* Skip OC programming */
};

/* Standard USB Port based on length:
 * - External
 * - Back Panel
 * - OTG
 * - M.2
 * - Internal device down */

#define USB2_PORT_EMPTY { \
	.enable        = 0, \
	.ocpin         = OC_SKIP, \
	.tx_bias       = USB2_BIAS_0MV, \
	.tx_emp_enable = USB2_EMP_OFF, \
	.pre_emp_bias  = USB2_BIAS_0MV, \
	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
}

/* Length = 11.5"-12" */
#define USB2_PORT_LONG(pin) { \
	.enable        = 1, \
	.ocpin         = (pin), \
	.tx_bias       = USB2_BIAS_39P35MV, \
	.tx_emp_enable = USB2_PRE_EMP_ON, \
	.pre_emp_bias  = USB2_BIAS_56P3MV, \
	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
}

/* Length  = 6"-11.49" */
#define USB2_PORT_MID(pin) { \
	.enable        = 1, \
	.ocpin         = (pin), \
	.tx_bias       = USB2_BIAS_0MV, \
	.tx_emp_enable = USB2_PRE_EMP_ON, \
	.pre_emp_bias  = USB2_BIAS_56P3MV, \
	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
}

/* Length = 3"-5.99" */
#define USB2_PORT_SHORT(pin) { \
	.enable        = 1, \
	.ocpin         = (pin), \
	.tx_bias       = USB2_BIAS_39P35MV, \
	.tx_emp_enable = USB2_PRE_EMP_ON | USB2_DE_EMP_ON, \
	.pre_emp_bias  = USB2_BIAS_39P35MV, \
	.pre_emp_bit   = USB2_FULL_BIT_PRE_EMP, \
}

/* Max TX and Pre-emp settings */
#define USB2_PORT_MAX(pin) { \
	.enable        = 1, \
	.ocpin         = (pin), \
	.tx_bias       = USB2_BIAS_56P3MV, \
	.tx_emp_enable = USB2_PRE_EMP_ON, \
	.pre_emp_bias  = USB2_BIAS_56P3MV, \
	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
}

/* Type-C Port, no BC1.2 charge detect module / MUX
 * Length  = 3.0" - 9.00" */
#define USB2_PORT_TYPE_C(pin) { \
	.enable        = 1, \
	.ocpin         = (pin), \
	.tx_bias       = USB2_BIAS_0MV, \
	.tx_emp_enable = USB2_PRE_EMP_ON, \
	.pre_emp_bias  = USB2_BIAS_56P3MV, \
	.pre_emp_bit   = USB2_HALF_BIT_PRE_EMP, \
}

struct usb3_port_config {
	uint8_t enable;
	uint8_t ocpin;
	uint8_t tx_de_emp;
	uint8_t tx_downscale_amp;
};

#define USB3_PORT_EMPTY { \
	.enable           = 0, \
	.ocpin            = OC_SKIP, \
	.tx_de_emp        = 0x00, \
	.tx_downscale_amp = 0x00, \
}

#define USB3_PORT_DEFAULT(pin) { \
	.enable           = 1, \
	.ocpin            = (pin), \
	.tx_de_emp        = 0x0, \
	.tx_downscale_amp = 0x00, \
}

#endif