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author | Jiaxin Wu <jiaxin.wu@intel.com> | 2024-05-24 15:46:51 +0800 |
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committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-08-28 15:25:27 +0000 |
commit | 0f36b5fa0a7834c0a4bf66125f6d37ebd0ce6c01 (patch) | |
tree | 4053ed9ec7540e3fd4d07bb590c9192d3aff7015 | |
parent | 39d9e15a9ed47ca3a72c06d4279c390869fd2793 (diff) | |
download | edk2-0f36b5fa0a7834c0a4bf66125f6d37ebd0ce6c01.tar.gz edk2-0f36b5fa0a7834c0a4bf66125f6d37ebd0ce6c01.tar.bz2 edk2-0f36b5fa0a7834c0a4bf66125f6d37ebd0ce6c01.zip |
UefiCpuPkg: Add ACPI S3 Enable HOB definition
This HOB indicates to x86 standalone MM whether S3 is enabled.
The value shall match with the PcdAcpiS3Enable.
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Co-Authored-by: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
-rw-r--r-- | UefiCpuPkg/Include/Guid/MmAcpiS3Enable.h | 34 | ||||
-rw-r--r-- | UefiCpuPkg/UefiCpuPkg.dec | 3 |
2 files changed, 37 insertions, 0 deletions
diff --git a/UefiCpuPkg/Include/Guid/MmAcpiS3Enable.h b/UefiCpuPkg/Include/Guid/MmAcpiS3Enable.h new file mode 100644 index 0000000000..8c1655914e --- /dev/null +++ b/UefiCpuPkg/Include/Guid/MmAcpiS3Enable.h @@ -0,0 +1,34 @@ +/** @file
+ This file defines ACPI_S3_ENABLE structure which indicates to x86 standalone MM whether S3 is enabled.
+
+ Copyright (c) 2024, Intel Corporation. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef MM_ACPI_S3_ENABLE_H_
+#define MM_ACPI_S3_ENABLE_H_
+
+///
+/// The GUID of the MmAcpiS3Enable GUIDed HOB.
+///
+#define MM_ACPI_S3_ENABLE_HOB_GUID \
+ { \
+ 0xe7402821, 0x2654, 0x4c1b, {0x99, 0x0e, 0x04, 0x8f, 0x8d, 0x82, 0xcf, 0x67} \
+ }
+
+///
+/// The structure defines the data layout of the MmAcpiS3Enable GUIDed HOB.
+///
+typedef struct {
+ ///
+ /// Whether ACPI S3 is enabled.
+ /// The value shall match with the PcdAcpiS3Enable.
+ ///
+ BOOLEAN AcpiS3Enable;
+} MM_ACPI_S3_ENABLE;
+
+extern EFI_GUID gMmAcpiS3EnableHobGuid;
+
+#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 5ae4af3e36..2cabf5fc03 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -117,6 +117,9 @@ ## Include/Guid/MmCpuSyncConfig.h
gMmCpuSyncConfigHobGuid = { 0x8b90bd26, 0xe4f9, 0x45c2, { 0x92, 0xa2, 0x9e, 0xac, 0xe6, 0x0e, 0x9d, 0xcc }}
+ # Include/Guid/MmAcpiS3Enable.h
+ gMmAcpiS3EnableHobGuid = { 0xe7402821, 0x2654, 0x4c1b, { 0x99, 0x0e, 0x04, 0x8f, 0x8d, 0x82, 0xcf, 0x67 }}
+
[Protocols]
## Include/Protocol/SmmCpuService.h
gEfiSmmCpuServiceProtocolGuid = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
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