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authorFeng Tian <feng.tian@intel.com>2016-04-12 14:08:49 +0800
committerFeng Tian <feng.tian@intel.com>2016-04-21 16:08:11 +0800
commit2a8b78cfd5f9e0f7f7a8c7111813054fb9040554 (patch)
tree045160a73ce4a3799a664e064a095f1c868a4015
parent83ceccabd3c2adc517ed27f59282737efe4e8bd0 (diff)
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MdeModulePkg/Sd: wait 1ms before check DATA line in voltage switch proc
According to SD Host Controller 3.0 spec figure 3-10, we have to wait 1ms before checking DAT[3:0] in voltage switch proc Cc: Hao Wu <hao.a.wu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Feng Tian <feng.tian@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
-rw-r--r--MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c2
-rw-r--r--MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
index d05eb9e9e6..b2a08572fe 100644
--- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
+++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdDevice.c
@@ -1123,7 +1123,7 @@ SdCardIdentification (
SdMmcHcInitClockFreq (PciIo, Slot, Private->Capability[Slot]);
- gBS->Stall (1);
+ gBS->Stall (1000);
SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_PRESENT_STATE, TRUE, sizeof (PresentState), &PresentState);
if (((PresentState >> 20) & 0xF) != 0xF) {
diff --git a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c
index 8f7ecf9395..cbee947993 100644
--- a/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c
+++ b/MdeModulePkg/Bus/Sd/SdBlockIoPei/SdHci.c
@@ -2832,7 +2832,7 @@ SdPeimIdentification (
SdPeimHcInitClockFreq (Slot->SdHcBase);
- MicroSecondDelay (1);
+ MicroSecondDelay (1000);
SdPeimHcRwMmio (Slot->SdHcBase + SD_HC_PRESENT_STATE, TRUE, sizeof (PresentState), &PresentState);
if (((PresentState >> 20) & 0xF) != 0xF) {