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authorDun Tan <dun.tan@intel.com>2022-07-26 22:13:40 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2022-08-15 05:15:43 +0000
commit62391b4ce962095018bffed55422ae4ba6ef94d6 (patch)
treee0f8af0227673aa673db30dc0d1298c96f3c701a
parent7b4754904efd5503d191f034ef17e982ceb65962 (diff)
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MdeModulePkg/DxeIpl: Remove clearing CR0.WP when protecting pagetable
Remove clearing CR0.WP when marking the memory used for page table as read-only in the page table itself created by DxeIpl. This page table address is written to Cr3 after these protection steps. Till this, the memory used for page table is always RW. Signed-off-by: Dun Tan <dun.tan@intel.com> Cc: Dandan Bi <dandan.bi@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Reviewed-by: Ray Ni <ray.ni@intel.com>
-rw-r--r--MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index a451ca1604..18b121d768 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -626,12 +626,7 @@ EnablePageTableProtection (
}
//
- // Disable write protection, because we need to mark page table to be write
- // protected.
- //
- AsmWriteCr0 (AsmReadCr0 () & ~CR0_WP);
-
- //
+ // No need to clear CR0.WP since PageTableBase has't been written to CR3 yet.
// SetPageTablePoolReadOnly might update mPageTablePool. It's safer to
// remember original one in advance.
//