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authorabnchang <abnchang@amd.com>2023-06-18 05:31:54 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2024-04-20 08:26:40 +0000
commit7dec566775c2b410e2133444e298afd0029981b6 (patch)
treea4469fee60064146ce1d7357b13a2a21cc489f11
parent0afb8743493853e30171f6000de51242e22a1eb8 (diff)
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MdePkg/Include: Update definitions of SPI related header files
BZ#: 4471 Update definitions according to PI spec 1.8 errata A Signed-off-by: Abner Chang <abner.chang@amd.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <gaoliming@byosoft.com.cn> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Cc: Abdul Lateef Attar <abdattar@amd.com> Cc: Brit Chesley <brit.chesley@amd.com> Reviewed-by: Abdul Lateef Attar <abdattar@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
-rw-r--r--MdePkg/Include/Protocol/SpiConfiguration.h10
-rw-r--r--MdePkg/Include/Protocol/SpiHc.h16
-rw-r--r--MdePkg/Include/Protocol/SpiIo.h12
3 files changed, 35 insertions, 3 deletions
diff --git a/MdePkg/Include/Protocol/SpiConfiguration.h b/MdePkg/Include/Protocol/SpiConfiguration.h
index 3f8fb9ff62..120b54bbad 100644
--- a/MdePkg/Include/Protocol/SpiConfiguration.h
+++ b/MdePkg/Include/Protocol/SpiConfiguration.h
@@ -2,10 +2,11 @@
This file defines the SPI Configuration Protocol.
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- This Protocol was introduced in UEFI PI Specification 1.6.
+ This Protocol was introduced in UEFI PI Specification 1.8 A.
**/
@@ -169,6 +170,13 @@ typedef struct _EFI_SPI_BUS {
} EFI_SPI_BUS;
///
+/// Definitions of SPI Part Attributes.
+///
+#define SPI_PART_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0
+#define SPI_PART_SUPPORTS_4_B1T_DATA_BUS_WIDTH BIT1
+#define SPI_PART_SUPPORTS_8_B1T_DATA_BUS_WIDTH BIT2
+
+///
/// The EFI_SPI_PERIPHERAL data structure describes how a specific block of
/// logic which is connected to the SPI bus. This data structure also selects
/// which upper level driver is used to manipulate this SPI device.
diff --git a/MdePkg/Include/Protocol/SpiHc.h b/MdePkg/Include/Protocol/SpiHc.h
index 30128dd5c4..354de72160 100644
--- a/MdePkg/Include/Protocol/SpiHc.h
+++ b/MdePkg/Include/Protocol/SpiHc.h
@@ -2,10 +2,11 @@
This file defines the SPI Host Controller Protocol.
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- This Protocol was introduced in UEFI PI Specification 1.6.
+ This Protocol was introduced in UEFI PI Specification 1.8 A.
**/
@@ -122,6 +123,19 @@ typedef EFI_STATUS
);
///
+/// Definitions of SPI Host Controller Attributes.
+///
+#define HC_SUPPORTS_WRITE_ONLY_OPERATIONS BIT0
+#define HC_SUPPORTS_READ_ONLY_OPERATIONS BIT1
+#define HC_SUPPORTS_WRITE_THEN_READ_OPERATIONS BIT2
+#define HC_TX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT3
+#define HC_RX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT4
+#define HC_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT5
+#define HC_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT6
+#define HC_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT7
+#define HC_TRANSFER_SIZE_INCLUDES_OPCODE BIT8
+#define HC_TRANSFER_SIZE_INCLUDES_ADDRESS BIT9
+///
/// Support a SPI data transaction between the SPI controller and a SPI chip.
///
struct _EFI_SPI_HC_PROTOCOL {
diff --git a/MdePkg/Include/Protocol/SpiIo.h b/MdePkg/Include/Protocol/SpiIo.h
index b4fc5e03b8..2c95a375a2 100644
--- a/MdePkg/Include/Protocol/SpiIo.h
+++ b/MdePkg/Include/Protocol/SpiIo.h
@@ -2,10 +2,11 @@
This file defines the SPI I/O Protocol.
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+ Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@par Revision Reference:
- This Protocol was introduced in UEFI PI Specification 1.6.
+ This Protocol was introduced in UEFI PI Specification 1.8 A.
**/
@@ -224,6 +225,15 @@ typedef struct _EFI_SPI_BUS_TRANSACTION {
} EFI_SPI_BUS_TRANSACTION;
///
+/// Definitions of SPI I/O Attributes.
+///
+#define SPI_IO_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0
+#define SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT1
+#define SPI_IO_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT2
+#define SPI_IO_TRANSFER_SIZE_INCLUDES_OPCODE BIT3
+#define SPI_IO_TRANSFER_SIZE_INCLUDES_ADDRESS BIT4
+
+///
/// Support managed SPI data transactions between the SPI controller and a SPI
/// chip.
///