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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2012-07-04 20:20:21 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2012-07-04 20:20:21 +0000
commit8cfd2e24578ea90e3152c4167df6889edeb33730 (patch)
tree5c0fbb14c3e2d537198b063a83016f82f4b3e3c8
parentae42bc88eecf25c449e3af7188e5fc7dc78f2b8f (diff)
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ArmPlatformPkg/Sec: Fixed Primary Non-Cold Boot Path
Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13499 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r--ArmPlatformPkg/Sec/Sec.c24
-rw-r--r--ArmPlatformPkg/Sec/SecEntryPoint.S4
-rw-r--r--ArmPlatformPkg/Sec/SecEntryPoint.asm4
3 files changed, 21 insertions, 11 deletions
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 6734653c3e..b8cc4973d8 100644
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -56,7 +56,7 @@ CEntryPoint (
ArmPlatformSecInitialize (MpId);
// Primary CPU clears out the SCU tag RAMs, secondaries wait
- if (IS_PRIMARY_CORE(MpId)) {
+ if (IS_PRIMARY_CORE(MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) {
if (ArmIsMpCore()) {
// Signal for the initial memory is configured (event: BOOT_MEM_INIT)
ArmCallSEV ();
@@ -150,17 +150,19 @@ TrustedWorldInitialization (
ArmPlatformSecTrustzoneInit (MpId);
// Setup the Trustzone Chipsets
- if (IS_PRIMARY_CORE(MpId)) {
- if (ArmIsMpCore()) {
- // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
- ArmCallSEV ();
- }
- } else if ((SecBootMode & ARM_SEC_BOOT_MASK) == ARM_SEC_COLD_BOOT) {
- // The secondary cores need to wait until the Trustzone chipsets configuration is done
- // before switching to Non Secure World
+ if (SecBootMode == ARM_SEC_COLD_BOOT) {
+ if (IS_PRIMARY_CORE(MpId)) {
+ if (ArmIsMpCore()) {
+ // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
+ ArmCallSEV ();
+ }
+ } else {
+ // The secondary cores need to wait until the Trustzone chipsets configuration is done
+ // before switching to Non Secure World
- // Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT)
- ArmCallWFE ();
+ // Wait for the Primary Core to finish the initialization of the Secure World (event: EVENT_SECURE_INIT)
+ ArmCallWFE ();
+ }
}
// Call the Platform specific function to execute additional actions if required
diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S
index 0c42a7baa5..5095c41697 100644
--- a/ArmPlatformPkg/Sec/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/SecEntryPoint.S
@@ -73,6 +73,10 @@ _WaitInitMem:
b _SetupSecondaryCoreStack
_InitMem:
+ // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
+ cmp r10, #ARM_SEC_COLD_BOOT
+ bne _SetupPrimaryCoreStack
+
// Initialize Init Boot Memory
bl ASM_PFX(ArmPlatformSecBootMemoryInit)
diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.asm b/ArmPlatformPkg/Sec/SecEntryPoint.asm
index 6af11bb506..e0d5922f15 100644
--- a/ArmPlatformPkg/Sec/SecEntryPoint.asm
+++ b/ArmPlatformPkg/Sec/SecEntryPoint.asm
@@ -75,6 +75,10 @@ _WaitInitMem
b _SetupSecondaryCoreStack
_InitMem
+ // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
+ cmp r10, #ARM_SEC_COLD_BOOT
+ bne _SetupPrimaryCoreStack
+
// Initialize Init Boot Memory
bl ArmPlatformSecBootMemoryInit