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| author | Jessica Clarke <jrtc27@jrtc27.com> | 2024-11-06 21:26:01 +0000 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-11-14 06:25:27 +0000 |
| commit | ef35863880ab7728e69c690603afb77182cb14ea (patch) | |
| tree | 659c9cfb9f36793825aba3a1c0cf09c6ce7cca48 | |
| parent | 6f07aeb49c2d94e460cbd3f36b8cfa81355c825f (diff) | |
| download | edk2-ef35863880ab7728e69c690603afb77182cb14ea.tar.gz edk2-ef35863880ab7728e69c690603afb77182cb14ea.tar.bz2 edk2-ef35863880ab7728e69c690603afb77182cb14ea.zip | |
ArmPlatformPkg,MdePkg: Rename AARCH64 CPACR_CP_FULL_ACCESS
CP_FULL_ACCESS is a misnomer, we only enable access to SIMD/FP state,
and although the register's mnemonic is CPACR_EL1, its full name is
"Architectural Feature Access Control Register", with AArch64 having no
coprocessors like AArch32 did, so the "CP" is also not appropriate.
Rename it to show it's the default value we use on entry, and define it
in terms of the existing CPACR_FPEN_FULL rather than a magic constant
with the same value to more clearly document that fact. Also update
comments to reflect all this (including the CPTR_EL2 case).
Continuous-integration-options: PatchCheck.ignore-multi-package
Signed-off-by: Jessica Clarke <jrtc27@jrtc27.com>
| -rw-r--r-- | ArmPlatformPkg/Sec/AArch64/Helper.S | 6 | ||||
| -rw-r--r-- | MdePkg/Include/AArch64/AArch64.h | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/ArmPlatformPkg/Sec/AArch64/Helper.S b/ArmPlatformPkg/Sec/AArch64/Helper.S index 121f99838c..578c41e0bb 100644 --- a/ArmPlatformPkg/Sec/AArch64/Helper.S +++ b/ArmPlatformPkg/Sec/AArch64/Helper.S @@ -12,8 +12,8 @@ ASM_FUNC(SetupExceptionLevel1)
mov x5, x30 // Save LR
- mov x0, #CPACR_CP_FULL_ACCESS
- bl ASM_PFX(ArmWriteCpacr) // Disable copro traps to EL1
+ mov x0, #CPACR_DEFAULT
+ bl ASM_PFX(ArmWriteCpacr) // Enable architectural features
ret x5
@@ -30,7 +30,7 @@ ASM_FUNC(SetupExceptionLevel2) // NB: We assume that we have not been entered on VHE systems with
// HCR_EL2.E2H set.
- msr cptr_el2, xzr // Disable copro traps to EL2
+ msr cptr_el2, xzr // Enable architectural features
// Enable Timer access for non-secure EL1 and EL0
// The cnthctl_el2 register bits are architecturally
diff --git a/MdePkg/Include/AArch64/AArch64.h b/MdePkg/Include/AArch64/AArch64.h index c1a24c1e30..3186bfb548 100644 --- a/MdePkg/Include/AArch64/AArch64.h +++ b/MdePkg/Include/AArch64/AArch64.h @@ -16,10 +16,10 @@ #define ARM_ARCH_EXCEPTION_IRQ EXCEPT_AARCH64_IRQ
// CPACR - Coprocessor Access Control Register definitions
-#define CPACR_TTA_EN (1UL << 28)
-#define CPACR_FPEN_EL1 (1UL << 20)
-#define CPACR_FPEN_FULL (3UL << 20)
-#define CPACR_CP_FULL_ACCESS 0x300000
+#define CPACR_TTA_EN (1UL << 28)
+#define CPACR_FPEN_EL1 (1UL << 20)
+#define CPACR_FPEN_FULL (3UL << 20)
+#define CPACR_DEFAULT CPACR_FPEN_FULL
// Coprocessor Trap Register (CPTR)
#define AARCH64_CPTR_TFP (1 << 10)
|