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authorTyler Smith <tylers@hp.com>2015-03-20 12:17:02 +0000
committerlersek <lersek@Edk2>2015-03-20 12:17:02 +0000
commitf61762d0c86b42c7922ed2d4326c9647252752ae (patch)
tree5efe4981bf6c2386b80757a90f42eb2818f59073
parentac2aaf315d95d0fc5dc670ce8d866de636b03d39 (diff)
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MdePkg: BaseSynchronizationLib: fix Increment/Decrement retvals for ARM
The procedure call standard dictates that we move the result to r0 before returning. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Tyler Smith <tylers@hp.com> Reviewed-by: Eugene Cohen <eugene@hp.com> Reviewed-by: Leif Lindholm <leif.lindholm@arm.com> Reviewed-by: Ronald Cron <Ronald.Cron@arm.com> [lersek@redhat.com: cleaned up commit message] git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17068 6f19259b-4bc3-4df7-8a09-765794883524
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S2
-rw-r--r--MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm2
2 files changed, 4 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S
index d699eb40d2..53e45a0b9a 100644
--- a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S
+++ b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S
@@ -179,6 +179,7 @@ TryInternalSyncIncrement:
cmp r2, #0
bne TryInternalSyncIncrement
dmb
+ mov r0, r1
bx lr
/**
@@ -208,4 +209,5 @@ TryInternalSyncDecrement:
cmp r2, #0
bne TryInternalSyncDecrement
dmb
+ mov r0, r1
bx lr
diff --git a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm
index dbc5991140..1c9a183b8f 100644
--- a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm
+++ b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm
@@ -178,6 +178,7 @@ TryInternalSyncIncrement
cmp r2, #0
bne TryInternalSyncIncrement
dmb
+ mov r0, r1
bx lr
/**
@@ -207,6 +208,7 @@ TryInternalSyncDecrement
cmp r2, #0
bne TryInternalSyncDecrement
dmb
+ mov r0, r1
bx lr
END