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| author | Sebastien Boeuf <sebastien.boeuf@intel.com> | 2022-01-11 20:31:29 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-01-13 14:54:40 +0000 |
| commit | fdcea7ff6ffa0bfcbc3cc860bebd028bd0aa5a10 (patch) | |
| tree | ea972273695ed306237019f58499a9c5286fd45f | |
| parent | 1552050ce7340af56c15726483801c71024208fc (diff) | |
| download | edk2-fdcea7ff6ffa0bfcbc3cc860bebd028bd0aa5a10.tar.gz edk2-fdcea7ff6ffa0bfcbc3cc860bebd028bd0aa5a10.tar.bz2 edk2-fdcea7ff6ffa0bfcbc3cc860bebd028bd0aa5a10.zip | |
OvmfPkg/CloudHv: Remove Q35 specifics
Anything specific to the QEMU Q35 platform is not relevant for the
CloudHv target.
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Jiewen Yao <Jiewen.yao@intel.com>
Signed-off-by: Sebastien Boeuf <sebastien.boeuf@intel.com>
| -rw-r--r-- | OvmfPkg/CloudHv/CloudHvX64.dsc | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc index d9dcde9f3d..961b1775c4 100644 --- a/OvmfPkg/CloudHv/CloudHvX64.dsc +++ b/OvmfPkg/CloudHv/CloudHvX64.dsc @@ -533,14 +533,6 @@ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
!endif
- # This PCD is used to set the base address of the PCI express hierarchy. It
- # is only consulted when OVMF runs on Q35. In that case it is programmed into
- # the PCIEXBAR register.
- #
- # On Q35 machine types that QEMU intends to support in the long term, QEMU
- # never lets the RAM below 4 GB exceed 2816 MB.
- gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xB0000000
-
!if $(SOURCE_DEBUG_ENABLE) == TRUE
gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
!endif
@@ -631,8 +623,6 @@ gUefiCpuPkgTokenSpaceGuid.PcdSevEsIsEnabled|0
!if $(SMM_REQUIRE) == TRUE
- gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes|8
- gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase|FALSE
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x01
gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|100000
!endif
|