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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-11-14 11:27:24 -0800 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-11-15 04:33:07 -0800 |
| commit | 66127011a544b90e800eb3619e84c2f94a354903 (patch) | |
| tree | 104bb5fd2ab57489e8be689ac09c380feedeb90f /ArmPkg/Drivers/ArmGic/GicV3 | |
| parent | 9cabe9d45755fa4e7412e4eba7825d0c46982001 (diff) | |
| download | edk2-66127011a544b90e800eb3619e84c2f94a354903.tar.gz edk2-66127011a544b90e800eb3619e84c2f94a354903.tar.bz2 edk2-66127011a544b90e800eb3619e84c2f94a354903.zip | |
ArmPkg/ArmGicDxe ARM: fix encoding for GICv3 interrupt acknowledge
Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses
the wrong system register encoding to access ICC_IAR1, and attempted
to access ICC_IAR0 instead. This results in boot time hangs both
under QEMU emulation and on real hardware.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'ArmPkg/Drivers/ArmGic/GicV3')
| -rw-r--r-- | ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S | 2 | ||||
| -rw-r--r-- | ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S index a72f3c8651..c308d2fa3e 100644 --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S +++ b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S @@ -66,7 +66,7 @@ ASM_FUNC(ArmGicV3EndOfInterrupt) // VOID
// );
ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
- mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
+ mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1
bx lr
//VOID
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm index 4228fb59be..222047d1ad 100644 --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm +++ b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm @@ -66,7 +66,7 @@ // VOID
// );
RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt
- mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
+ mrc p15, 0, r0, c12, c12, 0 //ICC_IAR1
bx lr
//VOID
|