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| author | Leif Lindholm <leif@nuviainc.com> | 2020-04-03 12:30:46 +0100 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2020-04-06 12:02:08 +0000 |
| commit | ee026ea78b0e32a9ffbaf0040afe91de8ae2179c (patch) | |
| tree | 976df12d581f8971676365d70efc5ef2c15bf21e /ArmPkg/Drivers/CpuDxe | |
| parent | ef5dcba975ee3b4c29b19ad0b23d371a2cd9d60a (diff) | |
| download | edk2-ee026ea78b0e32a9ffbaf0040afe91de8ae2179c.tar.gz edk2-ee026ea78b0e32a9ffbaf0040afe91de8ae2179c.tar.bz2 edk2-ee026ea78b0e32a9ffbaf0040afe91de8ae2179c.zip | |
ArmPkg: rename misleading local #define in CpuDxe
The local #define TT_ATTR_INDX_INVALID is used as a local error code
in the AArch64 implementation, but is misleadingly named to match the
definitions in ArmPkg/Include/Chipset/AArch64Mmu.h.
Rename it INVALID_ENTRY to reduce confusion and improve readability.
Signed-off-by: Leif Lindholm <leif@nuviainc.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
Diffstat (limited to 'ArmPkg/Drivers/CpuDxe')
| -rw-r--r-- | ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c index 29fa08f9e0..fca2d4f763 100644 --- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c +++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c @@ -13,7 +13,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include <Library/MemoryAllocationLib.h>
#include "CpuDxe.h"
-#define TT_ATTR_INDX_INVALID ((UINT32)~0)
+#define INVALID_ENTRY ((UINT32)~0)
#define MIN_T0SZ 16
#define BITS_PER_LEVEL 9
@@ -98,7 +98,7 @@ GetFirstPageAttribute ( {
return FirstEntry & TT_ATTR_INDX_MASK;
} else {
- return TT_ATTR_INDX_INVALID;
+ return INVALID_ENTRY;
}
}
@@ -139,8 +139,8 @@ GetNextEntryAttribute ( // If Entry is a Table Descriptor type entry then go through the sub-level table
if ((EntryType == TT_TYPE_BLOCK_ENTRY) ||
((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) {
- if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) {
- if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {
+ if ((*PrevEntryAttribute == INVALID_ENTRY) || (EntryAttribute != *PrevEntryAttribute)) {
+ if (*PrevEntryAttribute != INVALID_ENTRY) {
// Update GCD with the last region
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
*StartGcdRegion,
@@ -164,7 +164,7 @@ GetNextEntryAttribute ( (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))),
PrevEntryAttribute, StartGcdRegion);
} else {
- if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) {
+ if (*PrevEntryAttribute != INVALID_ENTRY) {
// Update GCD with the last region
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
*StartGcdRegion,
@@ -173,7 +173,7 @@ GetNextEntryAttribute ( // Start of the new region
*StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel));
- *PrevEntryAttribute = TT_ATTR_INDX_INVALID;
+ *PrevEntryAttribute = INVALID_ENTRY;
}
}
}
@@ -238,7 +238,7 @@ SyncCacheConfig ( &PageAttribute, &BaseAddressGcdRegion);
// Update GCD with the last region if valid
- if (PageAttribute != TT_ATTR_INDX_INVALID) {
+ if (PageAttribute != INVALID_ENTRY) {
SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors,
BaseAddressGcdRegion,
EndAddressGcdRegion - BaseAddressGcdRegion,
|