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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2017-02-15 17:11:54 +0000
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2017-02-21 17:23:03 +0000
commitce82984fe77cd6583f5e8bf2f6fd98262834f834 (patch)
treef6c7e9724cc21df4090b77e78bf76a5c752d9d40 /ArmPkg/Drivers
parentb7a09b71b67cf2d64e90d686c3525a8022bd5579 (diff)
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ArmPkg/CpuDxe: translate invalid memory types in EfiAttributeToArmAttribute
The single user of EfiAttributeToArmAttribute () is the protocol method EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes(), which uses the return value to compare against the ARM attributes of an existing mapping, to infer whether it is actually necessary to change anything, or whether the requested update is redundant. This saves some cache and TLB maintenance on 32-bit ARM systems that use uncached translation tables. However, EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes() may be invoked with only permission bits set, in which case the implied requested action is to update the permissions of the region without modifying the cacheability attributes. This is currently not possible, because EfiAttributeToArmAttribute () ASSERT()s [on AArch64] on Attributes arguments that lack a cacheability bit. So let's simply return TT_ATTR_INDX_MASK (AArch64) or TT_DESCRIPTOR_SECTION_TYPE_FAULT (ARM) in these cases (or'ed with the appropriate permission bits). This way, the return value is equally suitable for checking whether the attributes need to be modified, but in a way that accommodates the use without a cacheability bit set. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'ArmPkg/Drivers')
-rw-r--r--ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c4
-rw-r--r--ArmPkg/Drivers/CpuDxe/Arm/Mmu.c3
2 files changed, 1 insertions, 6 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index 15d5a81732..7688846e70 100644
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -216,9 +216,7 @@ EfiAttributeToArmAttribute (
ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK;
break;
default:
- DEBUG ((EFI_D_ERROR, "EfiAttributeToArmAttribute: 0x%lX attributes is not supported.\n", EfiAttributes));
- ASSERT (0);
- ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY;
+ ArmAttributes = TT_ATTR_INDX_MASK;
}
// Set the access flag to match the block attributes
diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
index 6dcfba69e8..b6ba975b35 100644
--- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c
@@ -733,10 +733,7 @@ EfiAttributeToArmAttribute (
case EFI_MEMORY_UCE:
default:
- // Cannot be implemented UEFI definition unclear for ARM
- // Cause a page fault if these ranges are accessed.
ArmAttributes = TT_DESCRIPTOR_SECTION_TYPE_FAULT;
- DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(): Unsupported attribute %x will page fault on access\n", EfiAttributes));
break;
}