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| author | Ard Biesheuvel <ardb@kernel.org> | 2024-06-19 17:17:38 +0200 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-06-19 17:25:11 +0000 |
| commit | e76be772aae59d3d58a92ac441e524a1a5c8952b (patch) | |
| tree | 0ce4e3a1f20ff92c14323764bf13279b19f418f3 /ArmPkg/Drivers | |
| parent | 4d4f56992460c039d0cfe48c394c2e07aecf1d22 (diff) | |
| download | edk2-e76be772aae59d3d58a92ac441e524a1a5c8952b.tar.gz edk2-e76be772aae59d3d58a92ac441e524a1a5c8952b.tar.bz2 edk2-e76be772aae59d3d58a92ac441e524a1a5c8952b.zip | |
ArmPkg/ArmLib ArmMmuLib: Drop support for EL3/MON execution
Drop logic from the ARM architectural support libraries that can only
execute in EL3 on AArch64 or Monitor mode on 32-bit ARM. While early
32-bit ports (and even some early 64-bit code) included some monitor
logic in EDK2, UEFI per the spec runs in non-secure execution contexts
only, and secure monitor and other secure world duties are usually
delegated to TF-A (Trusted Firmware for the A profile).
Since there are no longer users of this code in EDK2 or the
edk2-platforms tree, let's remove it from the core support libraries.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Diffstat (limited to 'ArmPkg/Drivers')
| -rw-r--r-- | ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S index 20f83aa85f..7316502d23 100644 --- a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S +++ b/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S @@ -17,7 +17,6 @@ //
#define ICC_SRE_EL1 S3_0_C12_C12_5
#define ICC_SRE_EL2 S3_4_C12_C9_5
-#define ICC_SRE_EL3 S3_6_C12_C12_5
#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7
#define ICC_EOIR1_EL1 S3_0_C12_C12_1
#define ICC_IAR1_EL1 S3_0_C12_C12_0
@@ -32,12 +31,10 @@ // VOID
// );
ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
- EL1_OR_EL2_OR_EL3(x1)
+ EL1_OR_EL2(x1)
1: mrs x0, ICC_SRE_EL1
b 4f
2: mrs x0, ICC_SRE_EL2
- b 4f
-3: mrs x0, ICC_SRE_EL3
4: ret
//VOID
@@ -46,12 +43,10 @@ ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable) // IN UINT32 ControlSystemRegisterEnable
// );
ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
- EL1_OR_EL2_OR_EL3(x1)
+ EL1_OR_EL2(x1)
1: msr ICC_SRE_EL1, x0
b 4f
2: msr ICC_SRE_EL2, x0
- b 4f
-3: msr ICC_SRE_EL3, x0
4: isb
ret
|