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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2016-10-28 12:36:19 +0100
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2016-10-28 16:26:15 +0100
commit4101c8753f4dfcb489afcba6d7dd20216545c417 (patch)
tree299065c94e3535f522d527987acdb45ee905531c /ArmPkg/Include
parentc44f9a42d4a564cb04372389276cd48c05ad9914 (diff)
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ArmPkg RVCT: add ADRL/LDRL macro equivalents
The GCC ARM builds have access to ADRL/LDRL macros that emit relative symbol references, i.e., references that do not require fixing up at load time (or FV generation time for XIP modules) Implement equivalent functionality for RVCT: note that this does not use movw/movt pairs, but the more compatible add/add/add or add/add/ldr sequences (which Clang does not support, unfortunately, hence the use of movw/movt for the GCC toolchain family) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'ArmPkg/Include')
-rw-r--r--ArmPkg/Include/AsmMacroIoLib.inc20
1 files changed, 20 insertions, 0 deletions
diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
index c9cad5230c..4bc3146fb3 100644
--- a/ArmPkg/Include/AsmMacroIoLib.inc
+++ b/ArmPkg/Include/AsmMacroIoLib.inc
@@ -26,4 +26,24 @@
ldr $Reg, =($Data)
MEND
+ MACRO
+ adrll $Reg, $Symbol
+ add $Reg, pc, #-8
+ RELOC R_ARM_ALU_PC_G0_NC, $Symbol
+ add $Reg, $Reg, #-4
+ RELOC R_ARM_ALU_PC_G1_NC, $Symbol
+ add $Reg, $Reg, #0
+ RELOC R_ARM_ALU_PC_G2, $Symbol
+ MEND
+
+ MACRO
+ ldrl $Reg, $Symbol
+ add $Reg, pc, #-8
+ RELOC R_ARM_ALU_PC_G0_NC, $Symbol
+ add $Reg, $Reg, #-4
+ RELOC R_ARM_ALU_PC_G1_NC, $Symbol
+ ldr $Reg, [$Reg, #0]
+ RELOC R_ARM_LDR_PC_G2, $Symbol
+ MEND
+
END