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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-02-22 09:38:19 +0000 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-02-22 13:22:41 +0000 |
| commit | de2a78247a2955e20a014fd8c47eb9792d1b437b (patch) | |
| tree | e609754b5c5180ae9763c643d6b0ccd86779a334 /ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | |
| parent | 91231b55d5302065fac71bf5040809aec65bb2f7 (diff) | |
| download | edk2-de2a78247a2955e20a014fd8c47eb9792d1b437b.tar.gz edk2-de2a78247a2955e20a014fd8c47eb9792d1b437b.tar.bz2 edk2-de2a78247a2955e20a014fd8c47eb9792d1b437b.zip | |
ArmPkg/ArmLib: AARCH64: set frame pointer in cache maintenance routine
Stack and unstack the frame pointer according to the AAPCS in
AArch64AllDataCachesOperation ().
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'ArmPkg/Library/ArmLib/AArch64/AArch64Support.S')
| -rw-r--r-- | ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index 5cee7c1519..886c420962 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -273,7 +273,8 @@ ASM_FUNC(ArmDisableBranchPrediction) ASM_FUNC(AArch64AllDataCachesOperation)
// We can use regs 0-7 and 9-15 without having to save/restore.
// Save our link register on the stack. - The stack must always be quad-word aligned
- str x30, [sp, #-16]!
+ stp x29, x30, [sp, #-16]!
+ mov x29, sp
mov x1, x0 // Save Function call in x1
mrs x6, clidr_el1 // Read EL1 CLIDR
and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC)
@@ -324,7 +325,7 @@ L_Skip: L_Finished:
dsb sy
isb
- ldr x30, [sp], #0x10
+ ldp x29, x30, [sp], #0x10
ret
|