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| author | Rebecca Cran <rebecca@nuviainc.com> | 2021-02-07 17:52:43 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-02-08 19:35:23 +0000 |
| commit | 84a6db75b5b459a8cfa25e2e35e2e69134cf3799 (patch) | |
| tree | 681a750f19140f75e4d77b0c91cbd881cf0ed046 /ArmPkg/Library | |
| parent | 6e131aff00805deb9a508eb250f753faf11ce669 (diff) | |
| download | edk2-84a6db75b5b459a8cfa25e2e35e2e69134cf3799.tar.gz edk2-84a6db75b5b459a8cfa25e2e35e2e69134cf3799.tar.bz2 edk2-84a6db75b5b459a8cfa25e2e35e2e69134cf3799.zip | |
ArmPkg: Add helper to read the CCSIDR2 register
Add helper function to read the CCSIDR2 register.
This is used when CCIDX is supported in AARCH32 mode.
Signed-off-by: Rebecca Cran <rebecca@nuviainc.com>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>
Diffstat (limited to 'ArmPkg/Library')
| -rw-r--r-- | ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 10 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm | 10 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmLib/ArmLibPrivate.h | 11 |
3 files changed, 31 insertions, 0 deletions
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S index af61dbee52..d843f91dfc 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S @@ -75,6 +75,16 @@ ASM_FUNC(ReadCCSIDR) bx lr
// UINT32
+// ReadCCSIDR2 (
+// IN UINT32 CSSELR
+// )
+ASM_FUNC(ReadCCSIDR2)
+ mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
+ isb
+ mrc p15,1,r0,c0,c0,2 @ Read current CP15 Cache Size ID Register (CCSIDR2)
+ bx lr
+
+// UINT32
// ReadCLIDR (
// IN UINT32 CSSELR
// )
diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm index 81f3cb7999..e14f156625 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm @@ -79,6 +79,16 @@ bx lr
// UINT32
+// ReadCCSIDR2 (
+// IN UINT32 CSSELR
+// )
+ RVCT_ASM_EXPORT ReadCCSIDR2
+ mcr p15,2,r0,c0,c0,0 ; Write Cache Size Selection Register (CSSELR)
+ isb
+ mrc p15,1,r0,c0,c0,2 ; Read current CP15 Cache Size ID Register (CCSIDR2)
+ bx lr
+
+// UINT32
// ReadCLIDR (
// IN UINT32 CSSELR
// )
diff --git a/ArmPkg/Library/ArmLib/ArmLibPrivate.h b/ArmPkg/Library/ArmLib/ArmLibPrivate.h index 25560a01e9..1818a1994d 100644 --- a/ArmPkg/Library/ArmLib/ArmLibPrivate.h +++ b/ArmPkg/Library/ArmLib/ArmLibPrivate.h @@ -170,6 +170,17 @@ ReadCCSIDR ( IN UINT32 CSSELR
);
+/** Reads the CCSIDR2 for the specified cache.
+
+ @param CSSELR The CSSELR cache selection register value
+
+ @return The contents of the CCSIDR2 register for the specified cache.
+**/
+UINT32
+ReadCCSIDR2 (
+ IN UINT32 CSSELR
+ );
+
UINT32
ReadCLIDR (
VOID
|