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| author | Olivier Martin <olivier.martin@arm.com> | 2013-11-28 21:38:56 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-11-28 21:38:56 +0000 |
| commit | 71fd27cbee1468395c0c2be58130bb7642817d25 (patch) | |
| tree | 43790c93fbe19518409b5de0c42f2248179186ce /ArmPkg | |
| parent | d4c92adef76ef0a52b3590946f4571f8f5c85365 (diff) | |
| download | edk2-71fd27cbee1468395c0c2be58130bb7642817d25.tar.gz edk2-71fd27cbee1468395c0c2be58130bb7642817d25.tar.bz2 edk2-71fd27cbee1468395c0c2be58130bb7642817d25.zip | |
ArmPkg/CpuDxe: Removed LR adjustement for SVC call
The Link Register (LR) does not need adjustement when receiving a Supervisor Call (SVC).
Note: SVC might be generated by debuggers.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14911 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg')
| -rw-r--r-- | ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.S | 1 | ||||
| -rw-r--r-- | ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.asm | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.S b/ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.S index 612ca02c7b..430bc5202d 100644 --- a/ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.S +++ b/ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.S @@ -120,7 +120,6 @@ ASM_PFX(UndefinedInstructionEntry): bx R1
ASM_PFX(SoftwareInterruptEntry):
- sub LR, LR, #4 @ Only -2 for Thumb, adjust in CommonExceptionEntry
srsdb #0x13! @ Store return state on SVC stack
@ We are already in SVC mode
stmfd SP!,{LR} @ Store the link register for the current mode
diff --git a/ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.asm b/ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.asm index 780e1f7cd3..f9672e4b64 100644 --- a/ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.asm +++ b/ArmPkg/Drivers/CpuDxe/ArmV6/ExceptionSupport.asm @@ -115,7 +115,6 @@ UndefinedInstructionEntry bx R1
SoftwareInterruptEntry
- sub LR, LR, #4 ; Only -2 for Thumb, adjust in CommonExceptionEntry
srsfd #0x13! ; Store return state on SVC stack
; We are already in SVC mode
stmfd SP!,{LR} ; Store the link register for the current mode
|