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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2019-01-04 19:04:31 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2019-01-13 17:32:55 +0100 |
| commit | e3ad54faa855fda3b3e145f54d37ee57e3a4def1 (patch) | |
| tree | 224aa09a4f09e265910630a0dfc0eebe52fe346f /ArmPkg | |
| parent | b8920ccc3c8d4abca35bb78c5845666b14fa7eb4 (diff) | |
| download | edk2-e3ad54faa855fda3b3e145f54d37ee57e3a4def1.tar.gz edk2-e3ad54faa855fda3b3e145f54d37ee57e3a4def1.tar.bz2 edk2-e3ad54faa855fda3b3e145f54d37ee57e3a4def1.zip | |
ArmPkg/ArmMmuLib ARM: add missing support for non-shareable cached mappings
Commit 829633e3a82 ("ArmPkg/ArmMmuLib: Add new attribute
WRITE_BACK_NONSHAREABLE") introduced support for non-shareable
cached mappings to the AArch64 version of ArmMmuLib, but the ARM
version was left behind, so fix that.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'ArmPkg')
| -rw-r--r-- | ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c index 889b22867d..b237321a8d 100644 --- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c @@ -135,6 +135,11 @@ PopulateLevel2PageTable ( case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
+ PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
+ PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;
+ break;
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_THROUGH;
@@ -239,6 +244,10 @@ FillTranslationTable ( case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
+ Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
+ break;
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
break;
@@ -251,6 +260,10 @@ FillTranslationTable ( case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
+ Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
+ break;
case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(1);
break;
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