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| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-22 23:05:20 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-09-22 23:05:20 +0000 |
| commit | 2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7 (patch) | |
| tree | fcc7592f5e22d5f0cc56be5339176545d885be52 /ArmPlatformPkg/ArmPlatformPkg.dec | |
| parent | f156d5b49d3f1c3dd1a9dc3c9b6d94b02c056ad1 (diff) | |
| download | edk2-2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7.tar.gz edk2-2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7.tar.bz2 edk2-2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7.zip | |
ArmPlatformPkg: Changed memory model for the stacks
In the previous version, every cores had the same stack size.
To avoid to waste memory with secondary core stacks, the primary core stack
size is now different from the secondary cores stack size.
These are the Stack PCDs and their default values:
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/ArmPlatformPkg.dec')
| -rw-r--r-- | ArmPlatformPkg/ArmPlatformPkg.dec | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec index 65b4977fdb..c5e40105e6 100644 --- a/ArmPlatformPkg/ArmPlatformPkg.dec +++ b/ArmPlatformPkg/ArmPlatformPkg.dec @@ -49,19 +49,21 @@ # These PCDs should be FeaturePcds. But we used these PCDs as an '#if' in an ASM file.
# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|0|UINT32|0x00000003
- gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores|1|UINT32|0x0000002D
-
+ gArmPlatformTokenSpaceGuid.PcdClusterCount|1|UINT32|0x00000038
+
# Stack for CPU Cores in Secure Mode
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0|UINT32|0x00000005
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize|0|UINT32|0x00000006
+ gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000|UINT32|0x00000036
+ gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006
# Stack for CPU Cores in Secure Monitor Mode
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0|UINT32|0x00000007
- gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0|UINT32|0x00000008
+ gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000|UINT32|0x00000008
# Stack for CPU Cores in Non Secure Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0|UINT32|0x00000009
- gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0|UINT32|0x0000000A
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT32|0x00000009
+ gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
+ gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
# Size of the region used by UEFI in permanent memory (Reserved 128MB by default)
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x08000000|UINT32|0x00000015
|