summaryrefslogtreecommitdiffstats
path: root/ArmPlatformPkg/Drivers
diff options
context:
space:
mode:
authorHaojian Zhuang <haojian.zhuang@linaro.org>2016-11-23 21:36:23 +0800
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2016-11-24 16:29:03 +0000
commit1df2fe1433b2420b7e11591e3d46ed1a2c146072 (patch)
tree1fb79193e45827b8271b66d0dc2beba7338ef072 /ArmPlatformPkg/Drivers
parenta28b9aef6769fd07c2b5e67a8c3c7a42bf486463 (diff)
downloadedk2-1df2fe1433b2420b7e11591e3d46ed1a2c146072.tar.gz
edk2-1df2fe1433b2420b7e11591e3d46ed1a2c146072.tar.bz2
edk2-1df2fe1433b2420b7e11591e3d46ed1a2c146072.zip
ArmPlatformPkg/PL180MciDxe: update for identifying SD
When CMD6 & ACMD51 are added into identifying SD process, PL180 should also support CMD6 & ACMD51. Otherwise, it will hang when system tries to read expected data. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Diffstat (limited to 'ArmPlatformPkg/Drivers')
-rw-r--r--ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c29
1 files changed, 22 insertions, 7 deletions
diff --git a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
index 5526aaca92..f8e4cc087c 100644
--- a/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
+++ b/ArmPlatformPkg/Drivers/PL180MciDxe/PL180Mci.c
@@ -63,11 +63,6 @@ MciIsReadOnly (
return (MmioRead32 (FixedPcdGet32 (PcdPL180SysMciRegAddress)) & SYS_MCI_WPROT);
}
-#if 0
-//Note: This function has been commented out because it is not used yet.
-// This function could be used to remove the hardcoded BlockLen used
-// in MciPrepareDataPath
-
// Convert block size to 2^n
STATIC
UINT32
@@ -87,7 +82,6 @@ GetPow2BlockLen (
return Pow2BlockLen;
}
-#endif
VOID
MciPrepareDataPath (
@@ -126,6 +120,23 @@ MciSendCommand (
MciPrepareDataPath (MCI_DATACTL_CARD_TO_CONT);
} else if ((MmcCmd == MMC_CMD24) || (MmcCmd == MMC_CMD20)) {
MciPrepareDataPath (MCI_DATACTL_CONT_TO_CARD);
+ } else if (MmcCmd == MMC_CMD6) {
+ MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF);
+ MmioWrite32 (MCI_DATA_LENGTH_REG, 64);
+#ifndef USE_STREAM
+ MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | GetPow2BlockLen (64));
+#else
+ MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS);
+#endif
+ } else if (MmcCmd == MMC_ACMD51) {
+ MmioWrite32 (MCI_DATA_TIMER_REG, 0xFFFFFFF);
+ /* SCR register is 8 bytes long. */
+ MmioWrite32 (MCI_DATA_LENGTH_REG, 8);
+#ifndef USE_STREAM
+ MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | GetPow2BlockLen (8));
+#else
+ MmioWrite32 (MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_CARD_TO_CONT | MCI_DATACTL_STREAM_TRANS);
+#endif
}
// Create Command for PL180
@@ -223,7 +234,11 @@ MciReadBlockData (
// Read data from the RX FIFO
Loop = 0;
- Finish = MMCI0_BLOCKLEN / 4;
+ if (Length < MMCI0_BLOCKLEN) {
+ Finish = Length / 4;
+ } else {
+ Finish = MMCI0_BLOCKLEN / 4;
+ }
// Raise the TPL at the highest level to disable Interrupts.
Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);