ArmPlatformPkg: remove old PL111/HdLcd driver code

Now that LcdGraphicsOutputDxe has been refactored, remove the old code
that is no longer used.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

6 files changed, 0 insertions, 615 deletions

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcd.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcd.c
deleted file mode 100644
index f5d7b53905..0000000000
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcd.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/** @file  Lcd.c

-

-  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>

-

-  This program and the accompanying materials

-  are licensed and made available under the terms and conditions of the BSD License

-  which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php

-

-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

-**/

-

-#include <Library/DebugLib.h>

-#include <Library/IoLib.h>

-#include <Library/LcdPlatformLib.h>

-#include <Library/MemoryAllocationLib.h>

-#include <Library/PcdLib.h>

-

-#include "HdLcd.h"

-#include "LcdGraphicsOutputDxe.h"

-

-/**********************************************************************

- *

- *  This file contains all the bits of the Lcd that are

- *  platform independent.

- *

- **********************************************************************/

-

-EFI_STATUS

-LcdInitialize (

-  IN EFI_PHYSICAL_ADDRESS   VramBaseAddress

-  )

-{

-  // Disable the controller

-  MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);

-

-  // Disable all interrupts

-  MmioWrite32(HDLCD_REG_INT_MASK, 0);

-

-  // Define start of the VRAM. This never changes for any graphics mode

-  MmioWrite32(HDLCD_REG_FB_BASE, (UINT32) VramBaseAddress);

-

-  // Setup various registers that never change

-  MmioWrite32(HDLCD_REG_BUS_OPTIONS,  (4 << 8) | HDLCD_BURST_8);

-  MmioWrite32(HDLCD_REG_POLARITIES,   HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | HDLCD_VSYNC_HIGH);

-  MmioWrite32(HDLCD_REG_PIXEL_FORMAT, HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL);

-  MmioWrite32(HDLCD_REG_RED_SELECT,   (0 << 16 | 8 << 8 |  0));

-  MmioWrite32(HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 |  8));

-  MmioWrite32(HDLCD_REG_BLUE_SELECT,  (0 << 16 | 8 << 8 | 16));

-

-  return EFI_SUCCESS;

-}

-

-EFI_STATUS

-LcdSetMode (

-  IN UINT32  ModeNumber

-  )

-{

-  EFI_STATUS        Status;

-  UINT32            HRes;

-  UINT32            HSync;

-  UINT32            HBackPorch;

-  UINT32            HFrontPorch;

-  UINT32            VRes;

-  UINT32            VSync;

-  UINT32            VBackPorch;

-  UINT32            VFrontPorch;

-  UINT32            BytesPerPixel;

-  LCD_BPP           LcdBpp;

-

-

-  // Set the video mode timings and other relevant information

-  Status = LcdPlatformGetTimings (ModeNumber,

-                                  &HRes,&HSync,&HBackPorch,&HFrontPorch,

-                                  &VRes,&VSync,&VBackPorch,&VFrontPorch);

-  ASSERT_EFI_ERROR (Status);

-  if (EFI_ERROR( Status )) {

-    return EFI_DEVICE_ERROR;

-  }

-

-  Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);

-  ASSERT_EFI_ERROR (Status);

-  if (EFI_ERROR( Status )) {

-    return EFI_DEVICE_ERROR;

-  }

-

-  BytesPerPixel = GetBytesPerPixel(LcdBpp);

-

-  // Disable the controller

-  MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);

-

-  // Update the frame buffer information with the new settings

-  MmioWrite32(HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel);

-  MmioWrite32(HDLCD_REG_FB_LINE_PITCH,  HRes * BytesPerPixel);

-  MmioWrite32(HDLCD_REG_FB_LINE_COUNT,  VRes - 1);

-

-  // Set the vertical timing information

-  MmioWrite32(HDLCD_REG_V_SYNC,         VSync);

-  MmioWrite32(HDLCD_REG_V_BACK_PORCH,   VBackPorch);

-  MmioWrite32(HDLCD_REG_V_DATA,         VRes - 1);

-  MmioWrite32(HDLCD_REG_V_FRONT_PORCH,  VFrontPorch);

-

-  // Set the horizontal timing information

-  MmioWrite32(HDLCD_REG_H_SYNC,         HSync);

-  MmioWrite32(HDLCD_REG_H_BACK_PORCH,   HBackPorch);

-  MmioWrite32(HDLCD_REG_H_DATA,         HRes - 1);

-  MmioWrite32(HDLCD_REG_H_FRONT_PORCH,  HFrontPorch);

-

-  // Enable the controller

-  MmioWrite32(HDLCD_REG_COMMAND, HDLCD_ENABLE);

-

-  return EFI_SUCCESS;

-}

-

-VOID

-LcdShutdown (

-  VOID

-  )

-{

-  // Disable the controller

-  MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);

-}

-

-EFI_STATUS

-LcdIdentify (

-  VOID

-  )

-{

-  return EFI_SUCCESS;

-}

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcd.h b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcd.h
deleted file mode 100644
index 6df97a9dfe..0000000000
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcd.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/** @file  HDLcd.h

-

- Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>

-

- This program and the accompanying materials

- are licensed and made available under the terms and conditions of the BSD License

- which accompanies this distribution.  The full text of the license may be found at

- http://opensource.org/licenses/bsd-license.php

-

- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

- **/

-

-#ifndef _HDLCD_H_

-#define _HDLCD_H_

-

-//

-// HDLCD Controller Register Offsets

-//

-

-#define HDLCD_REG_VERSION                 ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x000)

-#define HDLCD_REG_INT_RAWSTAT             ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x010)

-#define HDLCD_REG_INT_CLEAR               ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x014)

-#define HDLCD_REG_INT_MASK                ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x018)

-#define HDLCD_REG_INT_STATUS              ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x01C)

-#define HDLCD_REG_FB_BASE                 ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x100)

-#define HDLCD_REG_FB_LINE_LENGTH          ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x104)

-#define HDLCD_REG_FB_LINE_COUNT           ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x108)

-#define HDLCD_REG_FB_LINE_PITCH           ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x10C)

-#define HDLCD_REG_BUS_OPTIONS             ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x110)

-#define HDLCD_REG_V_SYNC                  ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x200)

-#define HDLCD_REG_V_BACK_PORCH            ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x204)

-#define HDLCD_REG_V_DATA                  ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x208)

-#define HDLCD_REG_V_FRONT_PORCH           ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x20C)

-#define HDLCD_REG_H_SYNC                  ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x210)

-#define HDLCD_REG_H_BACK_PORCH            ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x214)

-#define HDLCD_REG_H_DATA                  ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x218)

-#define HDLCD_REG_H_FRONT_PORCH           ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x21C)

-#define HDLCD_REG_POLARITIES              ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x220)

-#define HDLCD_REG_COMMAND                 ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x230)

-#define HDLCD_REG_PIXEL_FORMAT            ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x240)

-#define HDLCD_REG_RED_SELECT              ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x244)

-#define HDLCD_REG_GREEN_SELECT            ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x248)

-#define HDLCD_REG_BLUE_SELECT             ((UINTN)PcdGet32 (PcdArmHdLcdBase) + 0x24C)

-

-

-//

-// HDLCD Values of registers

-//

-

-// HDLCD Interrupt mask, clear and status register

-#define HDLCD_DMA_END                     BIT0    /* DMA has finished reading a frame */

-#define HDLCD_BUS_ERROR                   BIT1    /* DMA bus error */

-#define HDLCD_SYNC                        BIT2    /* Vertical sync */

-#define HDLCD_UNDERRUN                    BIT3    /* No Data available while DATAEN active */

-

-// CLCD_CONTROL Control register

-#define HDLCD_DISABLE                     0

-#define HDLCD_ENABLE                      BIT0

-

-// Bus Options

-#define HDLCD_BURST_1                     BIT0

-#define HDLCD_BURST_2                     BIT1

-#define HDLCD_BURST_4                     BIT2

-#define HDLCD_BURST_8                     BIT3

-#define HDLCD_BURST_16                    BIT4

-

-// Polarities - HIGH

-#define HDLCD_VSYNC_HIGH                  BIT0

-#define HDLCD_HSYNC_HIGH                  BIT1

-#define HDLCD_DATEN_HIGH                  BIT2

-#define HDLCD_DATA_HIGH                   BIT3

-#define HDLCD_PXCLK_HIGH                  BIT4

-// Polarities - LOW (for completion and for ease of understanding the hardware settings)

-#define HDLCD_VSYNC_LOW                   0

-#define HDLCD_HSYNC_LOW                   0

-#define HDLCD_DATEN_LOW                   0

-#define HDLCD_DATA_LOW                    0

-#define HDLCD_PXCLK_LOW                   0

-

-// Pixel Format

-#define HDLCD_LITTLE_ENDIAN              (0 << 31)

-#define HDLCD_BIG_ENDIAN                 (1 << 31)

-

-// Number of bytes per pixel

-#define HDLCD_4BYTES_PER_PIXEL           ((4 - 1) << 3)

-

-#endif /* _HDLCD_H_ */

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcdGraphicsOutputDxe.inf b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcdGraphicsOutputDxe.inf
deleted file mode 100644
index 896fc588b2..0000000000
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/HdLcdGraphicsOutputDxe.inf
+++ /dev/null
@@ -1,62 +0,0 @@
-#/** @file

-#

-#  Component description file for HDLCD module

-#

-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>

-#

-#  This program and the accompanying materials

-#  are licensed and made available under the terms and conditions of the BSD License

-#  which accompanies this distribution.  The full text of the license may be found at

-#  http://opensource.org/licenses/bsd-license.php

-#

-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-#

-#**/

-

-[Defines]

-  INF_VERSION                    = 0x00010005

-  BASE_NAME                      = HdLcdGraphicsDxe

-  FILE_GUID                      = ce660500-824d-11e0-ac72-0002a5d5c51b

-  MODULE_TYPE                    = DXE_DRIVER

-  VERSION_STRING                 = 1.0

-  ENTRY_POINT                    = LcdGraphicsOutputDxeInitialize

-

-[Sources.common]

-  LcdGraphicsOutputDxe.c

-  LcdGraphicsOutputBlt.c

-  HdLcd.c

-

-[Packages]

-  MdePkg/MdePkg.dec

-  MdeModulePkg/MdeModulePkg.dec

-  ArmPkg/ArmPkg.dec

-  ArmPlatformPkg/ArmPlatformPkg.dec

-

-[LibraryClasses]

-  ArmLib

-  UefiLib

-  BaseLib

-  DebugLib

-  TimerLib

-  UefiDriverEntryPoint

-  UefiBootServicesTableLib

-  IoLib

-  BaseMemoryLib

-  LcdPlatformLib

-

-[Protocols]

-  gEfiDevicePathProtocolGuid

-  gEfiGraphicsOutputProtocolGuid                # Produced

-  gEfiEdidDiscoveredProtocolGuid                # Produced

-  gEfiEdidActiveProtocolGuid                    # Produced

-  gEfiEdidOverrideProtocolGuid                  # Produced

-

-[FixedPcd]

-  gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase

-

-[FeaturePcd]

-  gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices

-

-[Depex]

-  gEfiCpuArchProtocolGuid

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111Lcd.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111Lcd.c
deleted file mode 100644
index a9ce60c5b0..0000000000
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111Lcd.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/** @file  PL111Lcd.c

-

-  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>

-

-  This program and the accompanying materials

-  are licensed and made available under the terms and conditions of the BSD License

-  which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php

-

-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

-**/

-

-#include <Library/IoLib.h>

-#include <Library/MemoryAllocationLib.h>

-

-#include "LcdGraphicsOutputDxe.h"

-#include "PL111Lcd.h"

-

-/**********************************************************************

- *

- *  This file contains all the bits of the PL111 that are

- *  platform independent.

- *

- **********************************************************************/

-

-EFI_STATUS

-LcdIdentify (

-  VOID

-  )

-{

-  DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL111\n",

-    PL111_REG_CLCD_PERIPH_ID_0));

-

-  // Check if this is a PL111

-  if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&

-      MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&

-     (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&

-      MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&

-      MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&

-      MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&

-      MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&

-      MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {

-    return EFI_SUCCESS;

-  }

-  return EFI_NOT_FOUND;

-}

-

-EFI_STATUS

-LcdInitialize (

-  IN EFI_PHYSICAL_ADDRESS   VramBaseAddress

-  )

-{

-  // Define start of the VRAM. This never changes for any graphics mode

-  MmioWrite32(PL111_REG_LCD_UP_BASE, (UINT32) VramBaseAddress);

-  MmioWrite32(PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer

-

-  // Disable all interrupts from the PL111

-  MmioWrite32(PL111_REG_LCD_IMSC, 0);

-

-  return EFI_SUCCESS;

-}

-

-EFI_STATUS

-LcdSetMode (

-  IN UINT32  ModeNumber

-  )

-{

-  EFI_STATUS        Status;

-  UINT32            HRes;

-  UINT32            HSync;

-  UINT32            HBackPorch;

-  UINT32            HFrontPorch;

-  UINT32            VRes;

-  UINT32            VSync;

-  UINT32            VBackPorch;

-  UINT32            VFrontPorch;

-  UINT32            LcdControl;

-  LCD_BPP           LcdBpp;

-

-  // Set the video mode timings and other relevant information

-  Status = LcdPlatformGetTimings (ModeNumber,

-                                  &HRes,&HSync,&HBackPorch,&HFrontPorch,

-                                  &VRes,&VSync,&VBackPorch,&VFrontPorch);

-  ASSERT_EFI_ERROR (Status);

-  if (EFI_ERROR( Status )) {

-    return EFI_DEVICE_ERROR;

-  }

-

-  Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);

-  ASSERT_EFI_ERROR (Status);

-  if (EFI_ERROR( Status )) {

-    return EFI_DEVICE_ERROR;

-  }

-

-  // Disable the CLCD_LcdEn bit

-  LcdControl = MmioRead32( PL111_REG_LCD_CONTROL);

-  MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl & ~1);

-

-  // Set Timings

-  MmioWrite32 (PL111_REG_LCD_TIMING_0, HOR_AXIS_PANEL(HBackPorch, HFrontPorch, HSync, HRes));

-  MmioWrite32 (PL111_REG_LCD_TIMING_1, VER_AXIS_PANEL(VBackPorch, VFrontPorch, VSync, VRes));

-  MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY(HRes));

-  MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);

-

-  // PL111_REG_LCD_CONTROL

-  LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP(LcdBpp) | PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;

-  MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl);

-

-  // Turn on power to the LCD Panel

-  LcdControl |= PL111_CTRL_LCD_PWR;

-  MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl);

-

-  return EFI_SUCCESS;

-}

-

-VOID

-LcdShutdown (

-  VOID

-  )

-{

-  // Disable the controller

-  MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN);

-}

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111Lcd.h b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111Lcd.h
deleted file mode 100644
index 18e28af805..0000000000
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111Lcd.h
+++ /dev/null
@@ -1,149 +0,0 @@
-/** @file  PL111Lcd.h

-

- Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>

- This program and the accompanying materials

- are licensed and made available under the terms and conditions of the BSD License

- which accompanies this distribution.  The full text of the license may be found at

- http://opensource.org/licenses/bsd-license.php

-

- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

- **/

-

-#ifndef _PL111LCD_H__

-#define _PL111LCD_H__

-

-/**********************************************************************

- *

- *  This header file contains all the bits of the PL111 that are

- *  platform independent.

- *

- **********************************************************************/

-

-// Controller Register Offsets

-#define PL111_REG_LCD_TIMING_0            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x000)

-#define PL111_REG_LCD_TIMING_1            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x004)

-#define PL111_REG_LCD_TIMING_2            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x008)

-#define PL111_REG_LCD_TIMING_3            ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x00C)

-#define PL111_REG_LCD_UP_BASE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x010)

-#define PL111_REG_LCD_LP_BASE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x014)

-#define PL111_REG_LCD_CONTROL             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x018)

-#define PL111_REG_LCD_IMSC                ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x01C)

-#define PL111_REG_LCD_RIS                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x020)

-#define PL111_REG_LCD_MIS                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x024)

-#define PL111_REG_LCD_ICR                 ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x028)

-#define PL111_REG_LCD_UP_CURR             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x02C)

-#define PL111_REG_LCD_LP_CURR             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x030)

-#define PL111_REG_LCD_PALETTE             ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0x200)

-

-// Identification Register Offsets

-#define PL111_REG_CLCD_PERIPH_ID_0        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE0)

-#define PL111_REG_CLCD_PERIPH_ID_1        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE4)

-#define PL111_REG_CLCD_PERIPH_ID_2        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFE8)

-#define PL111_REG_CLCD_PERIPH_ID_3        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFEC)

-#define PL111_REG_CLCD_P_CELL_ID_0        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF0)

-#define PL111_REG_CLCD_P_CELL_ID_1        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF4)

-#define PL111_REG_CLCD_P_CELL_ID_2        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFF8)

-#define PL111_REG_CLCD_P_CELL_ID_3        ((UINTN)PcdGet32 (PcdPL111LcdBase) + 0xFFC)

-

-#define PL111_CLCD_PERIPH_ID_0            0x11

-#define PL111_CLCD_PERIPH_ID_1            0x11

-#define PL111_CLCD_PERIPH_ID_2            0x04

-#define PL111_CLCD_PERIPH_ID_3            0x00

-#define PL111_CLCD_P_CELL_ID_0            0x0D

-#define PL111_CLCD_P_CELL_ID_1            0xF0

-#define PL111_CLCD_P_CELL_ID_2            0x05

-#define PL111_CLCD_P_CELL_ID_3            0xB1

-

-/**********************************************************************/

-

-// Register components (register bits)

-

-// This should make life easier to program specific settings in the different registers

-// by simplifying the setting up of the individual bits of each register

-// and then assembling the final register value.

-

-/**********************************************************************/

-

-// Register: PL111_REG_LCD_TIMING_0

-#define HOR_AXIS_PANEL(hbp,hfp,hsw,hor_res) (UINT32)(((UINT32)(hbp) << 24) | ((UINT32)(hfp) << 16) | ((UINT32)(hsw) << 8) | (((UINT32)((hor_res)/16)-1) << 2))

-

-// Register: PL111_REG_LCD_TIMING_1

-#define VER_AXIS_PANEL(vbp,vfp,vsw,ver_res) (UINT32)(((UINT32)(vbp) << 24) | ((UINT32)(vfp) << 16) | ((UINT32)(vsw) << 10) | ((ver_res)-1))

-

-// Register: PL111_REG_LCD_TIMING_2

-#define PL111_BIT_SHIFT_PCD_HI            27

-#define PL111_BIT_SHIFT_BCD               26

-#define PL111_BIT_SHIFT_CPL               16

-#define PL111_BIT_SHIFT_IOE               14

-#define PL111_BIT_SHIFT_IPC               13

-#define PL111_BIT_SHIFT_IHS               12

-#define PL111_BIT_SHIFT_IVS               11

-#define PL111_BIT_SHIFT_ACB               6

-#define PL111_BIT_SHIFT_CLKSEL            5

-#define PL111_BIT_SHIFT_PCD_LO            0

-

-#define PL111_BCD                         (1 << 26)

-#define PL111_IPC                         (1 << 13)

-#define PL111_IHS                         (1 << 12)

-#define PL111_IVS                         (1 << 11)

-

-#define CLK_SIG_POLARITY(hor_res)         (UINT32)(PL111_BCD | PL111_IPC | PL111_IHS | PL111_IVS | (((hor_res)-1) << 16))

-

-// Register: PL111_REG_LCD_TIMING_3

-#define PL111_BIT_SHIFT_LEE               16

-#define PL111_BIT_SHIFT_LED               0

-

-#define PL111_CTRL_WATERMARK              (1 << 16)

-#define PL111_CTRL_LCD_V_COMP             (1 << 12)

-#define PL111_CTRL_LCD_PWR                (1 << 11)

-#define PL111_CTRL_BEPO                   (1 << 10)

-#define PL111_CTRL_BEBO                   (1 << 9)

-#define PL111_CTRL_BGR                    (1 << 8)

-#define PL111_CTRL_LCD_DUAL               (1 << 7)

-#define PL111_CTRL_LCD_MONO_8             (1 << 6)

-#define PL111_CTRL_LCD_TFT                (1 << 5)

-#define PL111_CTRL_LCD_BW                 (1 << 4)

-#define PL111_CTRL_LCD_1BPP               (0 << 1)

-#define PL111_CTRL_LCD_2BPP               (1 << 1)

-#define PL111_CTRL_LCD_4BPP               (2 << 1)

-#define PL111_CTRL_LCD_8BPP               (3 << 1)

-#define PL111_CTRL_LCD_16BPP              (4 << 1)

-#define PL111_CTRL_LCD_24BPP              (5 << 1)

-#define PL111_CTRL_LCD_16BPP_565          (6 << 1)

-#define PL111_CTRL_LCD_12BPP_444          (7 << 1)

-#define PL111_CTRL_LCD_BPP(Bpp)           ((Bpp) << 1)

-#define PL111_CTRL_LCD_EN                 1

-

-/**********************************************************************/

-

-// Register: PL111_REG_LCD_TIMING_0

-#define PL111_LCD_TIMING_0_HBP(hbp)       (((hbp) & 0xFF) << 24)

-#define PL111_LCD_TIMING_0_HFP(hfp)       (((hfp) & 0xFF) << 16)

-#define PL111_LCD_TIMING_0_HSW(hsw)       (((hsw) & 0xFF) << 8)

-#define PL111_LCD_TIMING_0_PPL(ppl)       (((hsw) & 0x3F) << 2)

-

-// Register: PL111_REG_LCD_TIMING_1

-#define PL111_LCD_TIMING_1_VBP(vbp)       (((vbp) & 0xFF) << 24)

-#define PL111_LCD_TIMING_1_VFP(vfp)       (((vfp) & 0xFF) << 16)

-#define PL111_LCD_TIMING_1_VSW(vsw)       (((vsw) & 0x3F) << 10)

-#define PL111_LCD_TIMING_1_LPP(lpp)        ((lpp) & 0xFC)

-

-// Register: PL111_REG_LCD_TIMING_2

-#define PL111_BIT_MASK_PCD_HI             0xF8000000

-#define PL111_BIT_MASK_BCD                0x04000000

-#define PL111_BIT_MASK_CPL                0x03FF0000

-#define PL111_BIT_MASK_IOE                0x00004000

-#define PL111_BIT_MASK_IPC                0x00002000

-#define PL111_BIT_MASK_IHS                0x00001000

-#define PL111_BIT_MASK_IVS                0x00000800

-#define PL111_BIT_MASK_ACB                0x000007C0

-#define PL111_BIT_MASK_CLKSEL             0x00000020

-#define PL111_BIT_MASK_PCD_LO             0x0000001F

-

-// Register: PL111_REG_LCD_TIMING_3

-#define PL111_BIT_MASK_LEE                0x00010000

-#define PL111_BIT_MASK_LED                0x0000007F

-

-#endif /* _PL111LCD_H__ */

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
deleted file mode 100644
index 39e42bcbab..0000000000
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
+++ /dev/null
@@ -1,58 +0,0 @@
-#/** @file

-#

-#  Component description file for PL111LcdGraphicsOutputDxe module

-#

-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>

-#  This program and the accompanying materials

-#  are licensed and made available under the terms and conditions of the BSD License

-#  which accompanies this distribution.  The full text of the license may be found at

-#  http://opensource.org/licenses/bsd-license.php

-#

-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-#

-#**/

-

-[Defines]

-  INF_VERSION                    = 0x00010005

-  BASE_NAME                      = PL111LcdGraphicsDxe

-  FILE_GUID                      = 407B4008-BF5B-11DF-9547-CF16E0D72085

-  MODULE_TYPE                    = DXE_DRIVER

-  VERSION_STRING                 = 1.0

-  ENTRY_POINT                    = LcdGraphicsOutputDxeInitialize

-

-[Sources.common]

-  LcdGraphicsOutputDxe.c

-  LcdGraphicsOutputBlt.c

-  PL111Lcd.c

-

-[Packages]

-  MdePkg/MdePkg.dec

-  MdeModulePkg/MdeModulePkg.dec

-  ArmPkg/ArmPkg.dec

-  ArmPlatformPkg/ArmPlatformPkg.dec

-

-[LibraryClasses]

-  ArmLib

-  UefiLib

-  BaseLib

-  DebugLib

-  TimerLib

-  UefiDriverEntryPoint

-  UefiBootServicesTableLib

-  IoLib

-  BaseMemoryLib

-  LcdPlatformLib

-

-[Protocols]

-  gEfiDevicePathProtocolGuid

-  gEfiGraphicsOutputProtocolGuid

-

-[FixedPcd]

-  gArmPlatformTokenSpaceGuid.PcdPL111LcdBase

-

-[FeaturePcd]

-  gArmPlatformTokenSpaceGuid.PcdGopDisableOnExitBootServices

-

-[Depex]

-  gEfiCpuArchProtocolGuid