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| author | Leif Lindholm <leif.lindholm@linaro.org> | 2015-10-28 18:11:49 +0000 |
|---|---|---|
| committer | Leif Lindholm <leif.lindholm@linaro.org> | 2016-02-26 16:50:27 +0000 |
| commit | 328d8cfa6278a5558ce510662df73f4c17086567 (patch) | |
| tree | 12a8571d754cf48e3868e1150fbceb75359e43be /ArmPlatformPkg/Include | |
| parent | 41501f18fdc003f973460057e36fa097dca3e571 (diff) | |
| download | edk2-328d8cfa6278a5558ce510662df73f4c17086567.tar.gz edk2-328d8cfa6278a5558ce510662df73f4c17086567.tar.bz2 edk2-328d8cfa6278a5558ce510662df73f4c17086567.zip | |
ArmPlatformPkg: PL061 - rewrite the hardware interaction
The PL061 GPIO controller is a bit of an anachronism, and the existing
driver does nothing to hide this - leading to it being very tricky to
read.
Rewrite it to document (in comments and code) what is actually
happening, and fix some bugs in the process.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Diffstat (limited to 'ArmPlatformPkg/Include')
| -rw-r--r-- | ArmPlatformPkg/Include/Drivers/PL061Gpio.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/ArmPlatformPkg/Include/Drivers/PL061Gpio.h b/ArmPlatformPkg/Include/Drivers/PL061Gpio.h index 38458f4844..8fde2bb5ef 100644 --- a/ArmPlatformPkg/Include/Drivers/PL061Gpio.h +++ b/ArmPlatformPkg/Include/Drivers/PL061Gpio.h @@ -19,6 +19,7 @@ #include <Protocol/EmbeddedGpio.h>
// PL061 GPIO Registers
+#define PL061_GPIO_DATA_REG_OFFSET ((UINTN) 0x000)
#define PL061_GPIO_DATA_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x000)
#define PL061_GPIO_DIR_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x400)
#define PL061_GPIO_IS_REG ((UINT32)PcdGet32 (PcdPL061GpioBase) + 0x404)
@@ -46,9 +47,5 @@ // All bits low except one bit high, native bit length
#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))
-// All bits low except one bit high, restricted to 8 bits (i.e. ensures zeros above 8bits)
-#define GPIO_PIN_MASK_HIGH_8BIT(Pin) (GPIO_PIN_MASK(Pin) && 0xFF)
-// All bits high except one bit low, restricted to 8 bits (i.e. ensures zeros above 8bits)
-#define GPIO_PIN_MASK_LOW_8BIT(Pin) ((~GPIO_PIN_MASK(Pin)) && 0xFF)
#endif // __PL061_GPIO_H__
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