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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-09-22 23:12:23 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-09-22 23:12:23 +0000
commit77de7e5372fc188811acfc3222b3fd967b54de3f (patch)
tree21d4e2b50009e10010c8c75798f81d697db76fd1 /ArmPlatformPkg/PrePeiCore/MainMPCore.c
parent93d451c67bbaea0739abf988cb5a90b98228a950 (diff)
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ArmPlatformPkg: Add ArmPlatformGetPlatformPpiList()
This function exposes the Platform Specific PPIs. They can be used by any PrePi modules or passed to the PeiCore by PrePeiCore git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12422 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/PrePeiCore/MainMPCore.c')
-rw-r--r--ArmPlatformPkg/PrePeiCore/MainMPCore.c20
1 files changed, 16 insertions, 4 deletions
diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
index 58eeef1c3a..25a11cf1bd 100644
--- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
@@ -62,6 +62,12 @@ PrimaryMain (
)
{
EFI_SEC_PEI_HAND_OFF SecCoreData;
+ UINTN PpiListSize;
+ EFI_PEI_PPI_DESCRIPTOR *PpiList;
+ UINTN TemporaryRamBase;
+ UINTN TemporaryRamSize;
+
+ CreatePpiList (&PpiListSize, &PpiList);
// Enable the GIC Distributor
ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));
@@ -72,6 +78,12 @@ PrimaryMain (
ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
}
+ // Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
+ // the base of the primary core stack
+ PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
+ TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
+ TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
+
//
// Bind this information into the SEC hand-off state
// Note: this must be in sync with the stuff in the asm file
@@ -80,13 +92,13 @@ PrimaryMain (
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
- SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize); // We consider we run on the primary core (and so we use the first stack)
- SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize);
- SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
+ SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
+ SecCoreData.TemporaryRamSize = TemporaryRamSize;
+ SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;
SecCoreData.StackBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize/2));
SecCoreData.StackSize = SecCoreData.TemporaryRamSize / 2;
// Jump to PEI core entry point
- (PeiCoreEntryPoint)(&SecCoreData, (VOID *)&gSecPpiTable);
+ (PeiCoreEntryPoint)(&SecCoreData, PpiList);
}