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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-07-06 16:27:21 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-07-06 16:27:21 +0000
commitd269095b712ba45fd4aca55331b5e6f3045ce1ad (patch)
tree45ee937196347b33f6eeddf11cd3fa29c431a1f0 /ArmPlatformPkg/PrePi/MainMPCore.c
parenta6caee65ac3bba2ac649f20bf1c63f0a87050f17 (diff)
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ArmPlatformPkg: Change the memory model for the ARM Platform components
In the former memory model, the UEFI firmware was expected to be located at the top of the system memory. Stacks & Pi memory regions were set below the firmware. On some platform, the UEFI firmware could be shadowed by the ROM firmware (case of the BeagleBoard) and in some cases the firmware is copied at the beginning of the system memory. With this new memory model, stack and Pi/DXE memory regions are set at the top of the system memory wherever the UEFI firmware is located in the memory map. Because DXE core does not support shadowed firmwares, the system memory covered by the UEFI firmware is marked as 'Non Present' to avoid to be overlapped by DXE allocations. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11992 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/PrePi/MainMPCore.c')
-rw-r--r--ArmPlatformPkg/PrePi/MainMPCore.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c b/ArmPlatformPkg/PrePi/MainMPCore.c
index 238b919e29..165e7cfcb0 100644
--- a/ArmPlatformPkg/PrePi/MainMPCore.c
+++ b/ArmPlatformPkg/PrePi/MainMPCore.c
@@ -21,20 +21,19 @@
VOID
PrimaryMain (
IN UINTN UefiMemoryBase,
- IN UINTN StackBase,
IN UINT64 StartTimeStamp
)
{
//Enable the GIC Distributor
PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase));
- // If ArmVe has not been built as Standalone then we need to wake up the secondary cores
- if (!FixedPcdGet32(PcdStandalone)) {
+ // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader toresume their initialization
+ if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {
// Sending SGI to all the Secondary CPU interfaces
PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase), GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
}
- PrePiMain (UefiMemoryBase, StackBase, StartTimeStamp);
+ PrePiMain (UefiMemoryBase, StartTimeStamp);
// We must never return
ASSERT(FALSE);