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author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-11-01 23:41:20 +0000 |
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committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-11-01 23:41:20 +0000 |
commit | 513aa3497afd3b84f6f20ed53a18534cb72b2180 (patch) | |
tree | 1e06af4c806d01f6499e7662c5c3bce781fa7c54 /ArmPlatformPkg/Sec/Sec.inf | |
parent | 504d14603dab586779954485c0ca568b7bd41e25 (diff) | |
download | edk2-513aa3497afd3b84f6f20ed53a18534cb72b2180.tar.gz edk2-513aa3497afd3b84f6f20ed53a18534cb72b2180.tar.bz2 edk2-513aa3497afd3b84f6f20ed53a18534cb72b2180.zip |
ArmPlatformPkg/Sec: Replaced hardcode SCR and NSACR values by PCDs to enable CPU and Platform Specific settings
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12637 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Sec/Sec.inf')
-rw-r--r-- | ArmPlatformPkg/Sec/Sec.inf | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/ArmPlatformPkg/Sec/Sec.inf b/ArmPlatformPkg/Sec/Sec.inf index 9980c6b951..f80db4a630 100644 --- a/ArmPlatformPkg/Sec/Sec.inf +++ b/ArmPlatformPkg/Sec/Sec.inf @@ -54,9 +54,16 @@ gArmTokenSpaceGuid.PcdTrustzoneSupport
gArmTokenSpaceGuid.PcdVFPEnabled
+ gArmTokenSpaceGuid.PcdArmScr
+ gArmTokenSpaceGuid.PcdArmNsacr
+ gArmTokenSpaceGuid.PcdArmNonSecModeTransition
+
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmTokenSpaceGuid.PcdArmPrimaryCore
+ gArmTokenSpaceGuid.PcdSecureFvBaseAddress
+ gArmTokenSpaceGuid.PcdSecureFvSize
+
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
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