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authorLeif Lindholm <leif.lindholm@linaro.org>2014-11-11 00:43:03 +0000
committeroliviermartin <oliviermartin@Edk2>2014-11-11 00:43:03 +0000
commitbb5420bb2b5fa146de1ddf2da5932b214e5743a9 (patch)
treec13bc8704ee5bb4ccffd8531874136358271aad6 /ArmPlatformPkg
parent2a7e98a8cceb4546c602e6e50bafacf8a0595d59 (diff)
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ArmPlatformPkg: Increase more ARM address Pcd entries to 64-bit.
Some AArch64 platforms have RAM and flash devices >4GB. Update some additional Pcd entries to 64-bit, and change the corresponding PcdGet32 calls to PcdGet64. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16325 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg')
-rw-r--r--ArmPlatformPkg/ArmPlatformPkg.dec2
-rw-r--r--ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c5
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c4
-rw-r--r--ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c2
-rw-r--r--ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c4
-rw-r--r--ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c4
-rw-r--r--ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c6
-rw-r--r--ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c4
-rw-r--r--ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c4
-rwxr-xr-xArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c13
-rwxr-xr-xArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c20
-rwxr-xr-xArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c2
-rwxr-xr-xArmPlatformPkg/PlatformPei/PlatformPeiLib.c4
-rw-r--r--ArmPlatformPkg/PrePeiCore/MainMPCore.c4
-rw-r--r--ArmPlatformPkg/PrePeiCore/MainUniCore.c4
-rw-r--r--ArmPlatformPkg/PrePeiCore/PrePeiCore.c4
-rw-r--r--ArmPlatformPkg/Sec/Sec.c4
17 files changed, 46 insertions, 44 deletions
diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec
index 20c3c04ccb..b9f38b6747 100644
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -70,7 +70,7 @@
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000|UINT32|0x00000006
# Stack for CPU Cores in Non Secure Mode
- gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT32|0x00000009
+ gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0|UINT64|0x00000009
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000|UINT32|0x00000037
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000|UINT32|0x0000000A
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c
index 14d8c81b1b..e09e33a5e2 100644
--- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c
+++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbSecLibRTSM/ArmRealViewEbSec.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -73,5 +73,6 @@ ArmPlatformSecExtraAction (
OUT UINTN* JumpAddress
)
{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = (UINTN)PcdGet64 (PcdFvBaseAddress);
}
+
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c
index a0b98d0990..bae6d0b1df 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMFoundationSec.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -67,5 +67,5 @@ ArmPlatformSecExtraAction (
OUT UINTN* JumpAddress
)
{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64 (PcdFvBaseAddress);
}
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
index f5176eac90..9023715ab0 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibRTSM/RTSMSec.c
@@ -96,5 +96,5 @@ ArmPlatformSecExtraAction (
OUT UINTN* JumpAddress
)
{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64 (PcdFvBaseAddress);
}
diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c b/ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c
index 7961b0524e..aa4ced4582 100644
--- a/ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c
+++ b/ArmPlatformPkg/ArmVirtualizationPkg/Library/ArmVirtualizationPlatformLib/Virt.c
@@ -181,9 +181,9 @@ ArmPlatformInitializeSystemMemory (
//
ASSERT (NewSize >= SIZE_128MB);
ASSERT (
- (((UINT64)PcdGet32 (PcdFdBaseAddress) +
+ (((UINT64)PcdGet64 (PcdFdBaseAddress) +
(UINT64)PcdGet32 (PcdFdSize)) <= NewBase) ||
- ((UINT64)PcdGet32 (PcdFdBaseAddress) >= (NewBase + NewSize)));
+ ((UINT64)PcdGet64 (PcdFdBaseAddress) >= (NewBase + NewSize)));
}
VOID
diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c b/ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c
index 41d506cf71..af0d6e87da 100644
--- a/ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c
+++ b/ArmPlatformPkg/ArmVirtualizationPkg/Library/PlatformPeiLib/PlatformPeiLib.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
* Copyright (c) 2014, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
@@ -41,7 +41,7 @@ PlatformPeim (
CopyMem (NewBase, Base, FdtSize);
PcdSet64 (PcdDeviceTreeBaseAddress, (UINT64)(UINTN)NewBase);
- BuildFvHob (PcdGet32(PcdFvBaseAddress), PcdGet32(PcdFvSize));
+ BuildFvHob (PcdGet64 (PcdFvBaseAddress), PcdGet32 (PcdFvSize));
return EFI_SUCCESS;
}
diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
index df3e12944d..2ffbdbedd8 100644
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.c
@@ -34,7 +34,7 @@ ArmPlatformGetGlobalVariable (
// Ensure the Global Variable Size have been initialized
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
- GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+ GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
if (VariableSize == 4) {
*(UINT32*)Variable = ReadUnaligned32 ((CONST UINT32*)(GlobalVariableBase + VariableOffset));
@@ -57,7 +57,7 @@ ArmPlatformSetGlobalVariable (
// Ensure the Global Variable Size have been initialized
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
- GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+ GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
if (VariableSize == 4) {
WriteUnaligned32 ((UINT32*)(GlobalVariableBase + VariableOffset), *(UINT32*)Variable);
@@ -78,7 +78,7 @@ ArmPlatformGetGlobalVariableAddress (
// Ensure the Global Variable Size have been initialized
ASSERT (VariableOffset < PcdGet32 (PcdPeiGlobalVariableSize));
- GlobalVariableBase = PcdGet32 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
+ GlobalVariableBase = PcdGet64 (PcdCPUCoresStackBase) + PcdGet32 (PcdCPUCorePrimaryStackSize) - PcdGet32 (PcdPeiGlobalVariableSize);
return (VOID*)(GlobalVariableBase + VariableOffset);
}
diff --git a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
index 02cbb00daf..41af1836e1 100644
--- a/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
+++ b/ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.c
@@ -19,8 +19,8 @@
#include <Library/PcdLib.h>
#include <Library/DebugLib.h>
-#define IS_XIP() (((UINT32)PcdGet32 (PcdFdBaseAddress) > (UINT32)(PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize))) || \
- ((PcdGet32 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet64 (PcdSystemMemoryBase)))
+#define IS_XIP() (((UINT32)PcdGet64 (PcdFdBaseAddress) > (UINT32)(PcdGet64 (PcdSystemMemoryBase) + PcdGet64 (PcdSystemMemorySize))) || \
+ ((PcdGet64 (PcdFdBaseAddress) + PcdGet32 (PcdFdSize)) < PcdGet64 (PcdSystemMemoryBase)))
// Declared by ArmPlatformPkg/PrePi Module
extern UINTN mGlobalVariableBase;
diff --git a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c
index fc04977b5c..0e5529f75f 100644
--- a/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c
+++ b/ArmPlatformPkg/Library/ArmPlatformSecLibNull/ArmPlatformLibNullSec.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -70,5 +70,5 @@ ArmPlatformSecExtraAction (
OUT UINTN* JumpAddress
)
{
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64 (PcdFvBaseAddress);
}
diff --git a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
index 1e1b1ea64d..a452e38751 100755
--- a/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
+++ b/ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c
@@ -35,7 +35,7 @@ NonSecureWaitForFirmware (
UINTN InterruptId;
// The secondary cores will execute the firmware once wake from WFI.
- SecondaryStart = (VOID (*)())PcdGet32 (PcdFvBaseAddress);
+ SecondaryStart = (VOID (*)())(UINTN)PcdGet64 (PcdFvBaseAddress);
ArmCallWFI ();
@@ -69,6 +69,7 @@ ArmPlatformSecExtraAction (
{
CHAR8 Buffer[100];
UINTN CharCount;
+ UINTN* StartAddress;
if (FeaturePcdGet (PcdStandalone) == FALSE) {
@@ -77,7 +78,7 @@ ArmPlatformSecExtraAction (
//
if (ArmPlatformIsPrimaryCore (MpId)) {
- UINTN* StartAddress = (UINTN*)PcdGet32(PcdFvBaseAddress);
+ StartAddress = (UINTN*)(UINTN)PcdGet64 (PcdFvBaseAddress);
// Patch the DRAM to make an infinite loop at the start address
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
@@ -85,7 +86,7 @@ ArmPlatformSecExtraAction (
CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);
SerialPortWrite ((UINT8 *) Buffer, CharCount);
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64 (PcdFvBaseAddress);
} else {
// When the primary core is stopped by the hardware debugger to copy the firmware
// into DRAM. The secondary cores are still running. As soon as the first bytes of
@@ -104,10 +105,10 @@ ArmPlatformSecExtraAction (
if (ArmPlatformIsPrimaryCore (MpId)) {
// Signal the secondary cores they can jump to PEI phase
- ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
+ ArmGicSendSgiTo (PcdGet32 (PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
// To enter into Non Secure state, we need to make a return from exception
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64 (PcdFvBaseAddress);
} else {
// We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary
// cores would make crash the system by setting their stacks in DRAM before the primary core has not
@@ -115,6 +116,6 @@ ArmPlatformSecExtraAction (
*JumpAddress = (UINTN)NonSecureWaitForFirmware;
}
} else {
- *JumpAddress = PcdGet32(PcdFvBaseAddress);
+ *JumpAddress = PcdGet64 (PcdFvBaseAddress);
}
}
diff --git a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
index 0214897d8b..577b288400 100755
--- a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
+++ b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -102,33 +102,33 @@ MemoryPeim (
);
SystemMemoryTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemoryBase) + (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdSystemMemorySize);
- FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdBaseAddress) + (EFI_PHYSICAL_ADDRESS)PcdGet32(PcdFdSize);
+ FdTop = (EFI_PHYSICAL_ADDRESS)PcdGet64 (PcdFdBaseAddress) + (EFI_PHYSICAL_ADDRESS)PcdGet32 (PcdFdSize);
// EDK2 does not have the concept of boot firmware copied into DRAM. To avoid the DXE
// core to overwrite this area we must mark the region with the attribute non-present
- if ((PcdGet32 (PcdFdBaseAddress) >= PcdGet64 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) {
+ if ((PcdGet64 (PcdFdBaseAddress) >= PcdGet64 (PcdSystemMemoryBase)) && (FdTop <= SystemMemoryTop)) {
Found = FALSE;
// Search for System Memory Hob that contains the firmware
NextHob.Raw = GetHobList ();
while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {
if ((NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
- (PcdGet32(PcdFdBaseAddress) >= NextHob.ResourceDescriptor->PhysicalStart) &&
+ (PcdGet64 (PcdFdBaseAddress) >= NextHob.ResourceDescriptor->PhysicalStart) &&
(FdTop <= NextHob.ResourceDescriptor->PhysicalStart + NextHob.ResourceDescriptor->ResourceLength))
{
ResourceAttributes = NextHob.ResourceDescriptor->ResourceAttribute;
ResourceLength = NextHob.ResourceDescriptor->ResourceLength;
ResourceTop = NextHob.ResourceDescriptor->PhysicalStart + ResourceLength;
- if (PcdGet32(PcdFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {
+ if (PcdGet64 (PcdFdBaseAddress) == NextHob.ResourceDescriptor->PhysicalStart) {
if (SystemMemoryTop == FdTop) {
NextHob.ResourceDescriptor->ResourceAttribute = ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT;
} else {
// Create the System Memory HOB for the firmware with the non-present attribute
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,
- PcdGet32(PcdFdBaseAddress),
- PcdGet32(PcdFdSize));
+ PcdGet64 (PcdFdBaseAddress),
+ PcdGet32 (PcdFdSize));
// Top of the FD is system memory available for UEFI
NextHob.ResourceDescriptor->PhysicalStart += PcdGet32(PcdFdSize);
@@ -138,11 +138,11 @@ MemoryPeim (
// Create the System Memory HOB for the firmware with the non-present attribute
BuildResourceDescriptorHob (EFI_RESOURCE_SYSTEM_MEMORY,
ResourceAttributes & ~EFI_RESOURCE_ATTRIBUTE_PRESENT,
- PcdGet32(PcdFdBaseAddress),
- PcdGet32(PcdFdSize));
+ PcdGet64 (PcdFdBaseAddress),
+ PcdGet32 (PcdFdSize));
// Update the HOB
- NextHob.ResourceDescriptor->ResourceLength = PcdGet32(PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;
+ NextHob.ResourceDescriptor->ResourceLength = PcdGet64 (PcdFdBaseAddress) - NextHob.ResourceDescriptor->PhysicalStart;
// If there is some memory available on the top of the FD then create a HOB
if (FdTop < NextHob.ResourceDescriptor->PhysicalStart + ResourceLength) {
diff --git a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
index 587c4b5ce3..bc1ab2fef1 100755
--- a/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
+++ b/ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.c
@@ -116,7 +116,7 @@ InitializeMemory (
SystemMemoryBase = (UINTN)PcdGet64 (PcdSystemMemoryBase);
SystemMemoryTop = SystemMemoryBase + (UINTN)PcdGet64 (PcdSystemMemorySize);
- FdBase = (UINTN)PcdGet32 (PcdFdBaseAddress);
+ FdBase = (UINTN)PcdGet64 (PcdFdBaseAddress);
FdTop = FdBase + (UINTN)PcdGet32 (PcdFdSize);
//
diff --git a/ArmPlatformPkg/PlatformPei/PlatformPeiLib.c b/ArmPlatformPkg/PlatformPei/PlatformPeiLib.c
index 508b10dbd3..a27b168e2e 100755
--- a/ArmPlatformPkg/PlatformPei/PlatformPeiLib.c
+++ b/ArmPlatformPkg/PlatformPei/PlatformPeiLib.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
+* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@@ -24,7 +24,7 @@ PlatformPeim (
VOID
)
{
- BuildFvHob (PcdGet32(PcdFvBaseAddress), PcdGet32(PcdFvSize));
+ BuildFvHob (PcdGet64 (PcdFvBaseAddress), PcdGet32 (PcdFvSize));
return EFI_SUCCESS;
}
diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
index d40594f835..a86f739fd1 100644
--- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
@@ -131,7 +131,7 @@ PrimaryMain (
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
// the base of the primary core stack
PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
- TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
+ TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
// Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned
@@ -144,7 +144,7 @@ PrimaryMain (
// Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
- SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = TemporaryRamSize;
diff --git a/ArmPlatformPkg/PrePeiCore/MainUniCore.c b/ArmPlatformPkg/PrePeiCore/MainUniCore.c
index b437ad6510..6317f178ca 100644
--- a/ArmPlatformPkg/PrePeiCore/MainUniCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainUniCore.c
@@ -40,7 +40,7 @@ PrimaryMain (
// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
// the base of the primary core stack
PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
- TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
+ TemporaryRamBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) + PpiListSize;
TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
// Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned
@@ -53,7 +53,7 @@ PrimaryMain (
// Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
- SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
+ SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet64 (PcdFvBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = TemporaryRamSize;
diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
index 93d7e1c4c0..43ae40de2f 100644
--- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
+++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c
@@ -53,7 +53,7 @@ CreatePpiList (
ArmPlatformGetPlatformPpiList (&PlatformPpiListSize, &PlatformPpiList);
// Copy the Common and Platform PPis in Temporrary Memory
- ListBase = PcdGet32 (PcdCPUCoresStackBase);
+ ListBase = PcdGet64 (PcdCPUCoresStackBase);
CopyMem ((VOID*)ListBase, gCommonPpiTable, sizeof(gCommonPpiTable));
CopyMem ((VOID*)(ListBase + sizeof(gCommonPpiTable)), PlatformPpiList, PlatformPpiListSize);
@@ -154,7 +154,7 @@ PrePeiCoreGetGlobalVariableMemory (
{
ASSERT (GlobalVariableBase != NULL);
- *GlobalVariableBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) +
+ *GlobalVariableBase = (UINTN)PcdGet64 (PcdCPUCoresStackBase) +
(UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) -
(UINTN)PcdGet32 (PcdPeiGlobalVariableSize);
diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index 15584f1901..7127395e61 100644
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -123,7 +123,7 @@ CEntryPoint (
copy_cpsr_into_spsr ();
// Call the Platform specific function to execute additional actions if required
- JumpAddress = PcdGet32 (PcdFvBaseAddress);
+ JumpAddress = PcdGet64 (PcdFvBaseAddress);
ArmPlatformSecExtraAction (MpId, &JumpAddress);
NonTrustedWorldTransition (MpId, JumpAddress);
@@ -167,7 +167,7 @@ TrustedWorldInitialization (
}
// Call the Platform specific function to execute additional actions if required
- JumpAddress = PcdGet32 (PcdFvBaseAddress);
+ JumpAddress = PcdGet64 (PcdFvBaseAddress);
ArmPlatformSecExtraAction (MpId, &JumpAddress);
// Initialize architecture specific security policy