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| author | Jiewen Yao <jiewen.yao@intel.com> | 2017-01-14 15:40:20 +0800 |
|---|---|---|
| committer | Jiewen Yao <jiewen.yao@intel.com> | 2017-02-22 14:07:01 +0800 |
| commit | 22292ed344b8512c838bdd162533198b51a51c0c (patch) | |
| tree | 5b3afa17c49fcb226857a6a713151c0530404851 /BaseTools/Source/Python/Trim | |
| parent | d37fa01fbbe2cf0cd8b49069a71706a33cb4a53e (diff) | |
| download | edk2-22292ed344b8512c838bdd162533198b51a51c0c.tar.gz edk2-22292ed344b8512c838bdd162533198b51a51c0c.tar.bz2 edk2-22292ed344b8512c838bdd162533198b51a51c0c.zip | |
UefiCpuPkg/CpuDxe: Add memory attribute setting.
Add memory attribute setting in CpuArch protocol.
Previous SetMemoryAttributes() API only supports cache attribute setting.
This patch updated SetMemoryAttributes() API to support memory attribute
setting by updating CPU page table.
Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Diffstat (limited to 'BaseTools/Source/Python/Trim')
0 files changed, 0 insertions, 0 deletions