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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-02-22 09:38:18 +0000 |
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committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-02-22 13:22:41 +0000 |
commit | 91231b55d5302065fac71bf5040809aec65bb2f7 (patch) | |
tree | 89fa4a1e535c8aca08e2181e69c1234ae9d0f7e9 /BaseTools/Source/Python/Workspace | |
parent | 88dab294d249f2cc22a72a0c2aa307d8432492b9 (diff) | |
download | edk2-91231b55d5302065fac71bf5040809aec65bb2f7.tar.gz edk2-91231b55d5302065fac71bf5040809aec65bb2f7.tar.bz2 edk2-91231b55d5302065fac71bf5040809aec65bb2f7.zip |
ArmPlatformPkg/ArmPlatformStackLib: use callee preserved registers
The entry code in ArmPlatformStackSet () is a 1:1 transliteration of the
ARM version, which uses the callee preserved registers r3 - r7 (*) to
preserve the function arguments and the link register across a call to
ArmPlatformIsPrimaryCore ().
However, x3 - x7 are not callee preserved on AARCH64, and so we should use
registers >= x19 instead. While we're at it, drop an unnecessary preserve
of the link register, and simplify/deobfuscate the calculation of the
secondary stack position.
(*) Note that r3 is not actually a callee saved register even on ARM.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'BaseTools/Source/Python/Workspace')
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