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| author | Sami Mujawar <sami.mujawar@arm.com> | 2024-03-11 14:26:15 +0000 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-07-29 13:44:55 +0000 |
| commit | b0ecf17a31a2e372d4bf33185a10f60480c5cc0f (patch) | |
| tree | 541240e4d7ba4f28b1855cc569e4a12445ad65ef /DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h | |
| parent | ff249c62e30c3629273f5c4fb77da783f9a5b9a1 (diff) | |
| download | edk2-b0ecf17a31a2e372d4bf33185a10f60480c5cc0f.tar.gz edk2-b0ecf17a31a2e372d4bf33185a10f60480c5cc0f.tar.bz2 edk2-b0ecf17a31a2e372d4bf33185a10f60480c5cc0f.zip | |
DynamicTablesPkg: Move PCC structure definitions to Arch Common
Move PCC structure definitions from Arm Namespace header file to
the Arch Common namespace header file.
Cc: Pierre Gondois <Pierre.Gondois@arm.com>
Cc: Yeo Reum Yun <YeoReum.Yun@arm.com>
Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com>
Cc: Jeshua Smith <jeshuas@nvidia.com>
Cc: Jeff Brasen <jbrasen@nvidia.com>
Cc: Girish Mahadevan <gmahadevan@nvidia.com>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Diffstat (limited to 'DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h')
| -rw-r--r-- | DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h b/DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h index 63b24de2f2..e21e2ca4e0 100644 --- a/DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h +++ b/DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h @@ -451,6 +451,78 @@ typedef struct CmArchCommonCacheInfo { */
typedef AML_CPC_INFO CM_ARCH_COMMON_CPC_INFO;
+/** A structure that describes a
+ PCC Mailbox Register.
+*/
+typedef struct PccMailboxRegisterInfo {
+ /// GAS describing the Register.
+ EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE Register;
+
+ /** Mask of bits to preserve when writing.
+
+ This mask is also used for registers. The Register is only read
+ and there is no write mask required. E.g.:
+ - Error Status mask (Cf. PCC Subspace types 3/4/5).
+ - Command Complete Check mask (Cf. PCC Subspace types 3/4/5).
+ */
+ UINT64 PreserveMask;
+
+ /// Mask of bits to set when writing.
+ UINT64 WriteMask;
+} PCC_MAILBOX_REGISTER_INFO;
+
+/** A structure that describes the
+ PCC Subspace CHannel Timings.
+*/
+typedef struct PccSubspaceChannelTimingInfo {
+ /// Expected latency to process a command, in microseconds.
+ UINT32 NominalLatency;
+
+ /** Maximum number of periodic requests that the subspace channel can
+ support, reported in commands per minute. 0 indicates no limitation.
+
+ This field is ignored for the PCC Subspace type 5 (HW Registers based).
+ */
+ UINT32 MaxPeriodicAccessRate;
+
+ /** Minimum amount of time that OSPM must wait after the completion
+ of a command before issuing the next command, in microseconds.
+ */
+ UINT16 MinRequestTurnaroundTime;
+} PCC_SUBSPACE_CHANNEL_TIMING_INFO;
+
+/** A structure that describes a
+ Generic PCC Subspace (Type 0).
+*/
+typedef struct PccSubspaceGenericInfo {
+ /** Subspace Id.
+
+ Cf. ACPI 6.4, s14.7 Referencing the PCC address space
+ Cf. s14.1.2 Platform Communications Channel Subspace Structures
+ The subspace ID of a PCC subspace is its index in the array of
+ subspace structures, starting with subspace 0.
+
+ At most 256 subspaces are supported.
+ */
+ UINT8 SubspaceId;
+
+ /// Table type (or subspace).
+ UINT8 Type;
+
+ /// Base address of the shared memory range.
+ /// This field is ignored for the PCC Subspace type 5 (HW Registers based).
+ UINT64 BaseAddress;
+
+ /// Address length.
+ UINT64 AddressLength;
+
+ /// Doorbell Register.
+ PCC_MAILBOX_REGISTER_INFO DoorbellReg;
+
+ /// Mailbox Timings.
+ PCC_SUBSPACE_CHANNEL_TIMING_INFO ChannelTiming;
+} PCC_SUBSPACE_GENERIC_INFO;
+
#pragma pack()
#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_
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