DynamicTablesPkg: Add SSDT CMN-600 Table generator

The Generic ACPI for Arm Components 1.0 Platform Design
Document, s2.6.4 "ASL code examples" provides information
to describe an Arm CoreLink CMN-600 Coherent Mesh Network
using an ASL definition block table.

The SSDT CMN-600 Table Generator uses the Configuration
Manager protocol to obtain the following information about
the CMN-600 device on the platform:
 - the PERIPHBASE address location and address range;
 - the ROOTNODEBASE address location;
 - the number of Debug and Trace Controller (DTC)
   and their respective interrupt number;

The CMN-600 mesh is described using the CM_ARM_CMN_600_INFO
and CM_ARM_EXTENDED_INTERRUPT structures in the Configuration
Manager.

The SSDT CMN-600 Table generator:
 - gets the CMN-600 hardware information
   from the configuration manager.
 - uses the AmlLib interfaces to parse the AML
   template BLOB and construct an AML tree.
 - uses the AmlLib to update:
   - the "_UID" value;
   - the address location and range of the PERIPHBASE;
   - the address location of the ROOTNODEBASE;
   - the number of Debug and Trace Controller (DTC)
     and their respective interrupt number;
 - serializes the AML tree to an output buffer.
   This output buffer contains the fixed-up AML code,
   which is then installed as an ACPI SSDT table.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Co-authored-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Alexei Fedorov <Alexei.Fedorov@arm.com>

1 files changed, 58 insertions, 6 deletions

diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index b2534a6505..f065486644 100644
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -57,6 +57,7 @@ typedef enum ArmObjectID {
   EArmObjDeviceHandlePci,              ///< 33 - Device Handle Pci

   EArmObjGenericInitiatorAffinityInfo, ///< 34 - Generic Initiator Affinity

   EArmObjSerialPortInfo,               ///< 35 - Generic Serial Port Info

+  EArmObjCmn600Info,                   ///< 36 - CMN-600 Info

   EArmObjMax

 } EARM_OBJECT_ID;

 

@@ -653,18 +654,37 @@ typedef struct CmArmIdMapping {
   UINT32    Flags;

 } CM_ARM_ID_MAPPING;

 

-/** A structure that describes the

-    SMMU interrupts for the Platform.

-

-    ID: EArmObjSmmuInterruptArray

+/** A structure that describes the Arm

+    Generic Interrupts.

 */

-typedef struct CmArmSmmuInterrupt {

+typedef struct CmArmGenericInterrupt {

   /// Interrupt number

   UINT32    Interrupt;

 

   /// Flags

   UINT32    Flags;

-} CM_ARM_SMMU_INTERRUPT;

+} CM_ARM_GENERIC_INTERRUPT;

+

+/** A structure that describes the SMMU interrupts for the Platform.

+

+    Interrupt   Interrupt number.

+    Flags       Interrupt flags as defined for SMMU node.

+

+    ID: EArmObjSmmuInterruptArray

+*/

+typedef CM_ARM_GENERIC_INTERRUPT CM_ARM_SMMU_INTERRUPT;

+

+/** A structure that describes the AML Extended Interrupts.

+

+    Interrupt   Interrupt number.

+    Flags       Interrupt flags as defined by the Interrupt

+                Vector Flags (Byte 3) of the Extended Interrupt

+                resource descriptor.

+                See EFI_ACPI_EXTENDED_INTERRUPT_FLAG_xxx in Acpi10.h

+

+    ID: EArmObjExtendedInterruptInfo

+*/

+typedef CM_ARM_GENERIC_INTERRUPT CM_ARM_EXTENDED_INTERRUPT;

 

 /** A structure that describes the Processor Hierarchy Node (Type 0) in PPTT

 

@@ -825,6 +845,38 @@ typedef struct CmArmGenericInitiatorAffinityInfo {
   CM_OBJECT_TOKEN   DeviceHandleToken;

 } CM_ARM_GENERIC_INITIATOR_AFFINITY_INFO;

 

+/** A structure that describes the CMN-600 hardware.

+

+    ID: EArmObjCmn600Info

+*/

+typedef struct CmArmCmn600Info {

+  /// The PERIPHBASE address.

+  /// Corresponds to the Configuration Node Region (CFGR) base address.

+  UINT64                     PeriphBaseAddress;

+

+  /// The PERIPHBASE address length.

+  /// Corresponds to the CFGR base address length.

+  UINT64                     PeriphBaseAddressLength;

+

+  /// The ROOTNODEBASE address.

+  /// Corresponds to the Root node (ROOT) base address.

+  UINT64                     RootNodeBaseAddress;

+

+  /// The Debug and Trace Logic Controller (DTC) count.

+  /// CMN-600 can have maximum 4 DTCs.

+  UINT8                      DtcCount;

+

+  /// DTC Interrupt list.

+  /// The first interrupt resource descriptor pertains to

+  /// DTC[0], the second to DTC[1] and so on.

+  /// DtcCount determines the number of DTC Interrupts that

+  /// are populated. If DTC count is 2 then DtcInterrupt[2]

+  /// and DtcInterrupt[3] are ignored.

+  /// Note: The size of CM_ARM_CMN_600_INFO structure remains

+  /// constant and does not vary with the DTC count.

+  CM_ARM_EXTENDED_INTERRUPT  DtcInterrupt[4];

+} CM_ARM_CMN_600_INFO;

+

 #pragma pack()

 

 #endif // ARM_NAMESPACE_OBJECTS_H_