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authorSami Mujawar <sami.mujawar@arm.com>2024-03-11 14:00:01 +0000
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2024-07-29 13:44:55 +0000
commitff249c62e30c3629273f5c4fb77da783f9a5b9a1 (patch)
tree0aea64b50a9391d1d83b8c7020c796fcfac5724b /DynamicTablesPkg/Include
parentafa7f8a6b17996ec13e4ce9867e5ac41d17aa262 (diff)
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DynamicTablesPkg: Move Continuous perf control info to Arch Common
Move the Continuous perfformance control info object from Arm Namespace to the Arch Common namespace. Correspondingly also update the following modules to reflect the changes introduced by the move: - SSDT CPU topology generator - ConfigurationManagerObjectParser - Dynamic Plat Repo TokenFixer map. Cc: Pierre Gondois <Pierre.Gondois@arm.com> Cc: Yeo Reum Yun <YeoReum.Yun@arm.com> Cc: AbdulLateef Attar <AbdulLateef.Attar@amd.com> Cc: Jeshua Smith <jeshuas@nvidia.com> Cc: Jeff Brasen <jbrasen@nvidia.com> Cc: Girish Mahadevan <gmahadevan@nvidia.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Diffstat (limited to 'DynamicTablesPkg/Include')
-rw-r--r--DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h19
-rw-r--r--DynamicTablesPkg/Include/ArmNameSpaceObjects.h37
2 files changed, 28 insertions, 28 deletions
diff --git a/DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h b/DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h
index 17cd552a3f..63b24de2f2 100644
--- a/DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArchCommonNameSpaceObjects.h
@@ -38,6 +38,7 @@ typedef enum ArchCommonObjectID {
EArchCommonObjLpiInfo, ///< 15 - Lpi Info
EArchCommonObjProcHierarchyInfo, ///< 16 - Processor Hierarchy Info
EArchCommonObjCacheInfo, ///< 17 - Cache Info
+ EArchCommonObjCpcInfo, ///< 18 - Continuous Performance Control Info
EArchCommonObjMax
} EARCH_COMMON_OBJECT_ID;
@@ -432,6 +433,24 @@ typedef struct CmArchCommonCacheInfo {
UINT32 CacheId;
} CM_ARCH_COMMON_CACHE_INFO;
+/** A structure that describes the Cpc information.
+
+ Continuous Performance Control is described in DSDT/SSDT and associated
+ to cpus/clusters in the cpu topology.
+
+ Unsupported Optional registers should be encoded with NULL resource
+ Register {(SystemMemory, 0, 0, 0, 0)}
+
+ For values that support Integer or Buffer, integer will be used
+ if buffer is NULL resource.
+ If resource is not NULL then Integer must be 0
+
+ Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)
+
+ ID: EArchCommonObjCpcInfo
+*/
+typedef AML_CPC_INFO CM_ARCH_COMMON_CPC_INFO;
+
#pragma pack()
#endif // ARCH_COMMON_NAMESPACE_OBJECTS_H_
diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
index eade2afcd0..b9d1202be3 100644
--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h
@@ -51,15 +51,14 @@ typedef enum ArmObjectID {
EArmObjCmn600Info, ///< 20 - CMN-600 Info
EArmObjRmr, ///< 21 - Reserved Memory Range Node
EArmObjMemoryRangeDescriptor, ///< 22 - Memory Range Descriptor
- EArmObjCpcInfo, ///< 23 - Continuous Performance Control Info
- EArmObjPccSubspaceType0Info, ///< 24 - Pcc Subspace Type 0 Info
- EArmObjPccSubspaceType1Info, ///< 25 - Pcc Subspace Type 2 Info
- EArmObjPccSubspaceType2Info, ///< 26 - Pcc Subspace Type 2 Info
- EArmObjPccSubspaceType3Info, ///< 27 - Pcc Subspace Type 3 Info
- EArmObjPccSubspaceType4Info, ///< 28 - Pcc Subspace Type 4 Info
- EArmObjPccSubspaceType5Info, ///< 29 - Pcc Subspace Type 5 Info
- EArmObjEtInfo, ///< 30 - Embedded Trace Extension/Module Info
- EArmObjPsdInfo, ///< 31 - P-State Dependency (PSD) Info
+ EArmObjPccSubspaceType0Info, ///< 23 - Pcc Subspace Type 0 Info
+ EArmObjPccSubspaceType1Info, ///< 24 - Pcc Subspace Type 2 Info
+ EArmObjPccSubspaceType2Info, ///< 25 - Pcc Subspace Type 2 Info
+ EArmObjPccSubspaceType3Info, ///< 26 - Pcc Subspace Type 3 Info
+ EArmObjPccSubspaceType4Info, ///< 27 - Pcc Subspace Type 4 Info
+ EArmObjPccSubspaceType5Info, ///< 28 - Pcc Subspace Type 5 Info
+ EArmObjEtInfo, ///< 29 - Embedded Trace Extension/Module Info
+ EArmObjPsdInfo, ///< 30 - P-State Dependency (PSD) Info
EArmObjMax
} EARM_OBJECT_ID;
@@ -177,7 +176,7 @@ typedef struct CmArmGicCInfo {
UINT32 AffinityFlags;
/** Optional field: Reference Token for the Cpc info of this processor.
- i.e. a token referencing a CM_ARM_CPC_INFO object.
+ i.e. a token referencing a CM_ARCH_COMMON_CPC_INFO object.
*/
CM_OBJECT_TOKEN CpcToken;
@@ -715,24 +714,6 @@ typedef struct CmArmRmrDescriptor {
UINT64 Length;
} CM_ARM_MEMORY_RANGE_DESCRIPTOR;
-/** A structure that describes the Cpc information.
-
- Continuous Performance Control is described in DSDT/SSDT and associated
- to cpus/clusters in the cpu topology.
-
- Unsupported Optional registers should be encoded with NULL resource
- Register {(SystemMemory, 0, 0, 0, 0)}
-
- For values that support Integer or Buffer, integer will be used
- if buffer is NULL resource.
- If resource is not NULL then Integer must be 0
-
- Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)
-
- ID: EArmObjCpcInfo
-*/
-typedef AML_CPC_INFO CM_ARM_CPC_INFO;
-
/** A structure that describes a
PCC Mailbox Register.
*/